REV. 0

ADP3410

–10–

Printed Circuit Board Layout Considerations

Use the following general guidelines when designing printed

circuit boards:

1. Trace out the high-current paths and use short, wide traces

to make these connections.

2. Split the ground connections. Use separate planes for the

signal and power grounds, and tie them together at a single

point near the ADP3410.

3. The VCC bypass capacitor should be located as close as

possible to VCC and PGND pins.

Typical Application Circuit

The circuit in Figure 16 shows how the ADP3410 can be com-

bined with the ADP3421 to form a total power conversion solution

for a microprocessor. The combination provides the supply

voltages for the core processor, the I/O interface, and the clock.

VHYS

ADP3421

1

CLSET

2

LTO

3

LTI

4

LTB

5

VID4

6

VID3

7

VID2

8

VID1

9

VID0

10

CLKDRV

11

CLKFB

12

IODRV

13

IOFB

14

SD 15

PWRGD 16

UVLO 17

SSL 18

SSC 19

CORE 20

DACOUT 21

GND 22

OUT 23

VCC 24

RAMP 25

REG 26

CS+ 27

CS– 28

U1

R1

51.1k

R2

160k

3.3V

R10

10k

C2

100nF

C3

68 F

VRON

Q2

2N3906

C14

100 F

M1

IRF7811

D2

10BQ040

OVPSET

ADP3410

SD

GND

IN

DRVLSD

DLY

VCCGD

VCC

DRVL

PGND

SRMON

SW

DRVH

BST

U2

1

2

3

4

5

6

7

14

13

12

11

10

9

8

C20

10 F

Q1

MJD210

FROM

CPU

R11

220k

R12

470k

C22

1nF

C21

1.5nF

C1

100nF

C31

1pF

R16

3.3k

C41

1pF

C29

100pF

R17

75k

R6

7.5k

R5

10k

R18

576k

C23

1nF

C25

22nF

R21,10k

R19

2k

R15

332

R22

100k

C18

10pF

C28

10 F

C17

100nF

5V

M2

IRF7811

R8

2.2

R9

2.2

M3

IRF7811

VIN

L1

1 H

D1

10BQ040

5m

C32

15nF

C10

10 F

C15

10 F

C16

10 F

C4–C6,

C11, C12,

C26, C27

220 F

7

VCC ON CORE SENSE

V GATE

VCC CPU IO

VCC CPU CLK

VCC

CPU

CORE

GND

R20

10

Figure 16. Typical Application Circuit