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ADP3811AR Datasheet(PDF) 15 Page - Analog Devices |
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ADP3811AR Datasheet(HTML) 15 Page - Analog Devices |
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15 / 16 page ![]() ADP3810/ADP3811 –15– REV. 0 Step 9. Iterate CC1: Because fZ1 is very close to fCV, it will increase the error ampli- fier gain in a nonnegligible amount at the 0 dB point. The in- crease in gain is calculated as: 20 × log 1+ f Z1 f CV 2 = 7.1dB Now, the total error amplifier gain loss required is: GLOSS = 37.6 dB + 7.1 dB = 44.7 dB With this, the new fP1 can be calculated from the equation in Step 5. fP1 = 0.58 Hz Finally, CC1 is recalculated using the equation in Step 6. CC1 = 1 2 π× 400 kΩ× 0.58 Hz ≈ 0.7 µF Following these steps gives a cookbook method for calculating the compensation components for the voltage loop. As men- tioned above, these components can be optimized in the actual circuit. The results of a PSpice 1 analysis of the loop is shown in Figure 32. The open loop gain of the loop is 108 dB as calcu- lated. The crossover frequency is 100 Hz with a phase margin of 52 °. The graph shows the phase leveling off at 90°. In reality the phase will continue to fall as higher frequency parasitic poles take effect. 1PSpice is a trademark of MicroSim Corporation. FREQUENCY – Hz –100 0.01 100k 0.1 1 10 100 200 100 0 0 180 90 1k 0dB CROSSOVER PHASE MARGIN = 52 Figure 32. Voltage Loop Gain/Phase Plots Voltage Loop Compensation, Battery Present When the battery has finished charging and is still connected to the charging circuitry, the system is said to be “floating” the bat- tery. The loop is maintaining a constant output voltage equal to the battery voltage, and the output current has dropped to nearly zero. This case is actually the easiest to compensate be- cause the battery’s capacitance creates a very low frequency dominant pole, giving a single pole response. For example, if the battery is modeled as a 10 Farad capacitor, the dominant pole will be 1/(2 π × 1.2 kΩ × 10 F) = 0.013 MHz. This very low fre- quency pole causes the system to cross over 0 dB at less than 10 Hz, giving a stable single pole system. The compensation components have little effect on this response, so no further calculations are needed for this case. Current Loop Compensation Now that the voltage loop compensation is complete, it is time to add the compensation for the current loop. The definitions for modulator gain and error amplifier gain are the same as be- fore; but now, the controlling error amplifier is GM1 in Figure 31, as opposed to GM2, for the voltage loop. Otherwise, the calculations are very similar. Step 10. Calculate the dc loop gain (GLOOP), fPM, and fZM: GMOD = 20 × log GM 3 × ITXOC × RF × AV 2 ×GM 4 × RCS [] GMOD = 20 × log 6 mA /V × 0.36 × 3.3 kΩ× 0.333 ×1.0 A /V × 0.25 Ω =−4.5 dB GEA = 20 × log GM1× R5 []=20log 8.3 mA /V × 400 kΩ []=70.4dB GLOOP = –6.1 dB + 70.4 dB = 64.3 dB f PM = 1 2 π× R CS + RF1 ()×C F1 = 1 2 π×0.35 Ω×1mF = 450 Hz f ZM = 1 2 π× R F1 × CF1 = 1 2 π×0.1Ω×1mF =1.6 kHz Step 11. Pick the current loop crossover frequency, fCI: From Step 2 in the voltage loop calculations, fCI ~ 1.9 kHz. Step 12. Calculate GMOD at fCI: The modulator gain of –4.5 dB is the dc gain. The modulator pole reduces this gain above fPM. GMOD = 1.9 kHz ()=G MOD dc ()−20×log 1+ fCI f PM 2 + 20 × log 1+ f CI f ZM 2 GMOD = 1.9 kHz ()=−4.5dB−12.7dB+3.8dB = –13.4dB If the 1 mF capacitor has a much higher ESR, e.g., 1 Ω, the modulator zero, fZM, will be lower in frequency than the modu- lator pole, fPM. This causes the loop gain and bandwidth to in- crease and could cause instability. One possible solution to this scenario is to use a much higher value (47 nF) for the CF = 1 nF capacitor. The pole of this capacitor would then be in the 1 kHz range and would reduce the loop gain. If the ESR is much less than 0.1 Ω, the bandwidth of the loop will decrease slightly. Step 13. Calculate gain loss of GEA at fCI: The gain loss of GEA in the current loop is a combination of the loss due to CC1, RC1 and the additional loss from CC2, RC2. To calculate the contribution of gain roll-off needed from CC2, RC2, the effective gain of GEA must first be calculated. Since the gain is calculated at 1.9 kHz, the impedance of CC1 is 120 Ω. Thus, the gain becomes: GEA 1.9 kHz ()=20×log GM1× R6+R C1 + 120 Ω () [] GEA 1.9 kHz ()=20×log 8.3mA/V × 10320 Ω () []= 38.9dB GLOSS = GEA (1.9 kHz) – GMOD (1.9 kHz) = 38.9 dB – 13.4 dB = 25.5 dB |
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