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RT8082 Datasheet(PDF) 13 Page - Richtek Technology Corporation |
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RT8082 Datasheet(HTML) 13 Page - Richtek Technology Corporation |
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13 / 14 page ![]() RT8082 13 DS8082-00 November 2012 www.richtek.com © Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Figure 2. Derating Curve of Maximum Power Dissipation Layout Considerations Follow the PCB layout guidelines for optimal performance of the IC. Keep the traces of the main current paths as short and wide as possible. Put the input capacitor as close as possible to VIN pin. LX node is with high frequency voltage swing and should be kept at small area. Keep analog components away from the LX node to prevent stray capacitive noise pick- up. Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback components near the IC. Connect all analog grounds to a common node and then connect the common node to the power ground behind the output capacitors. Figure 3. PCB Layout Guide LX should be connected to inductor by wide and short trace, and keep sensitive components away from this trace Place the feedback resistors as close to the IC as possible Place the input and output capacitors as close to the IC as possible LX AGND PGND FB PGND VOUT CIN CIN COUT L R1 R2 VIN BIAS LX VIN EN PGOOD PGND NC 11 10 9 1 2 3 4 5 12 67 8 13 VOUT 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0 25 50 75 100 125 Ambient Temperature (°C) Four-Layer PCB |
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