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IR3558 Datasheet(PDF) 13 Page - International Rectifier |
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IR3558 Datasheet(HTML) 13 Page - International Rectifier |
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13 / 21 page ![]() September 10, 2012 | FINAL DATASHEET 13 IR3558 45A Integrated PowIRstage® THEORY OF OPERATION DESCRIPTION The IR3558 PowIRstage® is a synchronous buck driver with co-packed MOSFETs with integrated Schottky diode, which provides system designers with ease of use and flexibility required in cutting edge CPU, GPU and DDR memory power delivery designs and other high-current low-profile applications. The IR3558 is designed to work with a PWM controller. It accepts either regular 3.3V tri-state PWM signal or International Rectifier’s Active Tri-Level (ATL) PWM signal, which is selectable by MODE pin. The IR3558 provides Enable input to control the converter output and reduce quiesecent current. The IR3558 provides a over temperature fault signal capable of detecting an over-temperature condition in the vicinity of the power stage. The over-temperature threshold is programmable from 70°C to 150°C. PWM MODE SELECTION The IR3558 features a MODE pin which allows operation with two different PWM signal levels. Grounding the MODE pin allows the IR3558 to accept a regular tri-state PWM with signal from 0V to 3.3V for low to high transitions. A PWM voltage level in the tri-state window of 0.85V and 2.55V for 80ns hold off time results in turning off both the control and synchronous MOSFETs. Floating MODE pin or connecting it to VCC enables the IR3558 to accept IR’s proprietary ATL mode, in which the PWM voltage level is from 0V to 1.8V for low to high transitions. A PWM voltage level greater than the tri-state high threshold (2.5V typical) turns off both the control and synchronous MOSFETs. REGULAR 3.3V PWM MODE If MODE pin is grounded, the IR3558 accepts regular 3- level 3.3V PWM input signals. As shown in Figure 6, when PWM input is above VPWM_HIGH, the synchronous MOSFET is turned off and the control MOSFET is turned on. When PWM input is below VPWM_LOW, the control MOSFET is turned off and synchronous MOSFET is turned on. If PWM pin is floated, the built-in resistors pull the PWM pin into a tri-state region centered around 1.6V. Figures 19-23 show the PWM input and the corresponding SW and GATEL output of the IR3558. ACTIVE TRI-LEVEL PWM MODE When MODE pin is floating, the IR3558 accepts a unique tri-level PWM control signal provided by an IR digital PWM controller. As shown in Figure 7, the rising and falling edges of the PWM signal transition between 0V and 1.8V to switch both the control and synchronous MOSFETs during normal PWM operation. To turn both MOSFETs off simultaneously, the PWM signal crosses a tri-state voltage level higher than the VATL_TRI_HIGH threshold (2.5V typical). This threshold based tri-state results in a very fast disable with only a small propagation delay. MOSFET switching resumes when the PWM signal falls below the VATL_TRI_LOW threshold (2.3V typical) into the normal PWM operating voltage range. Figures 24-28 show the PWM input and the corresponding SW and GATEL output of the IR3558. This fast tri-state operation eliminates the need for the PWM signal to dwell in the shutdown window, eliminating the delay time created by the PWM pull-up and pull-down resistors with the PWM trace routing capacitance. A dedicated Body-Braking® pin is not required, which simplifies the routing and layout. One advantage of the ATL is the ability to quickly turn-off all synchronous MOSFETs during a load release event. This is known as Body-Braking® since all the load current is forced to flow momentarily through the body diodes of the MOSFETs, which discharges the inductor current faster and results in a much lower overshoot on the output voltage. The IR3558 provides a 1mA typical pull-up current to drive the PWM input to the tri-state condition of 3.3V when the PWM controller output is in its high impedance state. The 1mA typical current is designed for driving worst case stray capacitances and transition the IR3558 into the tri-state condition rapidly to avoid a prolonged period of conduction of the control or synchronous MOSFET during faulty conditions. Once the PWM signal has been pulled up, the 1mA current is disabled to reduce power consumption. ENABLE CONTROL EN is a 3.3V logic input. Logic low disables PWM operation and places the power stage in tri-state, as shown in Figure 29. It also places the driver in a low power state with minimum quiescent current. Logic high enables the device. INTEGRATED BOOTSTRAP DIODE The bootstrap circuit is used to establish the gate voltage for the high-side driver. It consists of a diode and capacitor |
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