20

20

Agere Systems Inc.

Data Sheet, Rev. 3

June 2001

Two-Cable Transceiver/Arbiter Device

FW802A Low-Power PHY IEEE 1394A-2000

Table 9. PHY Register Fields for the Cable Environment (continued)

The port status page is used to access configuration and status information for each of the PHY’s ports. The port is

selected by writing zero to Page_select and the desired port number to Port_select in the PHY register at address

meanings of the register fields with the port status page are defined by Table 11.

Table 10. PHY Register Page 0: Port Status Page

Field

Size Type

Power Reset

Value

Description

Enab_accel

1

rw

0

Enable Arbitration Acceleration. When set to one, the PHY will

use the enhancements specified in clause 8.11 of 1394a-2000

specification. PHY behavior is unspecified if the value of

Enab_accel is changed while a bus request is pending.

Enab_multi

1

rw

0

Enable multispeed packet concatenation. When set to one, the link

will signal the speed of all packets to the PHY.

Page_select

3

rw

000

Selects which of eight possible PHY register pages are accessible

Port_select

4

rw

000

If the page selected by Page_select presents per-port information,

this field selects which port’s registers are accessible through the

Ports are numbered monotonically starting at zero, p0.

Address

Contents

Bit 0

Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

AStat

BStat

Child

Connected

Bias

Disabled

Negotiated_speed

Int_enable

Fault

XXXXX XXXXX XXXXX

XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX

XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX

XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX

XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX

XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX

XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX

REQUIRED