T8532 datasheet(42/50 Pages) AGERE

42 / 50 page

Agere Systems Inc.

Preliminary Data Sheet

September 2001

Codec Chip Set

T8531A/T8532 Multichannel Programmable

Software Interface (continued)

Table 41 shows the memory map for the DSP engine ROM. The ROM information is not accessible via the micro-

processor. The total ROM size is 8 Kwords.

Table 41. DSP Engine ROM Memory Map

Address Range

Memory Contents

0x0003

HDS interrupt service routine

0x0008

Time-slot sync interrupt service routine

0x000B

Start-up routine

0x0380

Time segment controller (ts_proc)

0x03B0

Double precision multiply routine

0x03B8

Double precision multiply routine

0x0400

Transmit path active routine

0x0500

Receive path active routine

0x0503

RX path active without reading from the system interface

0x0600

Transmit path inactive/loopback routine

0x0610

Transmit path inactive routine

0x0680

Receive path inactive/loopback routine

0x0690

Receive path inactive routine

0x0700

Self-test pass 1 setup (TX)

0x0720

Self-test pass 2 setup (RX)

0x07A0

Tone generation start-up

0x0860

Tone detection start-up

0x0A80

Variance calculation

0x0B00

Peak detection routine

0x0B60

dc generation

0x0B80

ROM checker

0x0C00

RAM checker

0x0E00

Variance calculation with TX filters

0x0F00

Simultaneous start-up of tone generator and DFT routine

0x0F10

Simultaneous start-up of tone generator and original variance routine

0x0F20

Routine places TX and RX halves of a time slot into inactive loopback

0x0F30

Places TX and RX halves of a time slot into inactive routine

0x0F40

Routine for copying values in channel coefficient table 0 to all 16-channel tables

0x0F60

Approximate location of HDS code

0x0FFE

Checksum for ROM 0x0000 : 0x07FF

T8532 Datasheet(PDF) 42 Page - Agere Systems

T8532 Datasheet(HTML) 42 Page - Agere Systems

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

Datasheet Download

Link URL