Preliminary Data Sheet

July 2001

Signal Processor

T8533/34 Quad Programmable Line Card

Agere Systems Inc.

13

Protocol (continued)

* Location of memory bank selection. All user controls are in memory bank 0; other memory banks contain internal state information for the

device.

Note: Data field length is in bytes for all operations. All data is transmitted in bytes with the LSB for each byte transmitted first. For 16-bit mem-

ory operations, the least significant byte of the first memory location is transmitted first, followed by the most significantbyte; each byte is

transmitted LSB first. Additional memory locations are loaded in ascending sequence.

Figure 5. Command Frame Format, Master to Slave, Read or Write Commands

Note: All data is transmitted in bytes with the LSB for each byte transmitted first. For memory operations, the least significant byte of the first

memory location is transmitted first, followed by the most significant byte, each byte transmitted LSB first. Additional memory locations

are loaded in ascending sequence.

Figure 6. Command Frame Format, Slave to Master, Read Commands

LSB

MSB LSB

MSB LSB

MSB LSB

COMMAND (8 bits)

START ADDRESS (8 bits)

DATA FIELD LENGTH (8 bits)

DATA FIELD (VARIABLE LENGTH) WRITE OPERATIONS ONLY

TIME

76

5432

10

MSB

LSB

START ADDRESS:

76

5432

10

MSB

LSB

DATA FIELD LENGTH:

76

5432

10

MSB

LSB

COMMAND:

0*

0*

CKT

SELECT

00

COMMAND

CKT SELECT:

CKT a:

CKT b:

CKT c:

CKT d:

00

01

10

11

COMMANDS: FAST SCAN MODE:

WRITE MEMORY:

WRITE ALL CHANNELS:

READ MEMORY:

10

01

11

00

LSB

DATA FIELD (VARIABLE LENGTH) READ OPERATIONS ONLY