© 1999 Fairchild Semiconductor Corporation

DS009500

www.fairchildsemi.com

June 1988

Revised July 1999

74F219

64-Bit Random Access Memory with 3-STATE Outputs

General Description

The 74F219 is a high-speed 64-bit RAM organized as a 16-

word by 4-bit array. Address inputs are buffered to mini-

mize loading and are fully decoded on-chip. The outputs

are 3-STATE and are in the high-impedance state when-

ever the Chip Select (CS) input is HIGH. The outputs are

active only in the Read mode. This device is similar to the

74F189 but features non-inverting, rather than inverting,

data outputs.

Features

s 3-STATE outputs for data bus applications

s Buffered inputs minimize loading

s Address decoding on-chip

s Diode clamped inputs minimize ringing

s Available in SOIC (300 mil only)

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

Order Number

Package Number

Package Description

74F219SC

M16B

16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

74F219SJ

M16D

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74F219PC

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide