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L9758 Datasheet(PDF) 25 Page - STMicroelectronics |
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L9758 Datasheet(HTML) 25 Page - STMicroelectronics |
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25 / 29 page ![]() L9758 Operating modes Doc ID 14273 Rev 3 25/29 rate of the common voltage reference so the slew is different for each regulator because all start together and reach the steady-state at the same time but with different voltage levels. 6.3 Power down The power down sequence starts when both IGN and PSU_EN signal are low. In this phase there is no control of the linear regulator output voltages. The falling slew-rate is defined from load currents and load capacitors. A voltage comparator controls VDDL voltage and ensures that the VDDL supply voltage will drop below 2V before initiating a new power-up sequence. Figure 4. Power up/down sequence 6.4 Low voltage operation When L9758 is up and running it is fully operational with the VBAT and VBAT_SW pin voltages down to VLVI_LOW. When L9758 is up and running and the supply voltages are less than 5.5V and are greater or equal to VLVI_LOW if the boost option is used the device is fully operational. If only the buck regulator is used the L9758 operates as follow: ● Switching regulator runs at 100% duty cycle ● VKAM and VSTBY regulators are fully operational ● VDDL fully operational ● VCORE fully operational ● VDD5 out of range with output voltage no less than 3.2V ● Tracking regulators out of range with output voltages no less than 3.2V ● Reset monitor RST5 and RSTL fully operational, with reset at RST5 pin in allowed IGN or PSU_EN VB Vth_Start VDD5 VDDL Inductor current Soft start Slew rate control Current limitation VCORE RST5 RSTL |
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