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AD7658BSTZ Datasheet(PDF) 27 Page - Analog Devices |
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AD7658BSTZ Datasheet(HTML) 27 Page - Analog Devices |
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27 / 32 page ![]() Data Sheet AD7656/AD7657/AD7658 Rev. D | Page 27 of 32 Daisy-Chain Mode (DCEN = 1, SER/PAR = 1) When reading conversion data back from the AD7656/AD7657/ AD7658 using their three/two/one DOUT pins, it is possible to configure the parts to operate in daisy-chain mode, using the DCEN pin. This daisy-chain feature allows multiple AD7656/ AD7657/AD7658 devices to be cascaded together and is useful for reducing component count and wiring connections. An example connection of two devices is shown in Figure 33. This configuration shows two DOUT lines being used. Simultaneous sampling of the 12 analog inputs is possible by using a common CONVSTx signal. The DB5, DB4, and DB3 data pins are used as data input pins DCIN [A:C] for the daisy-chain mode. The rising edge of CONVST is used to initiate a conversion on the AD7656/AD7657/AD7658. After the BUSY signal has gone low to indicate that the conversion is complete, the user can begin to read the data from the two devices. Figure 34 shows the serial timing diagram when operating two AD7656/AD7657/ D7658 devices in daisy-chain mode. The CS falling edge is used to frame the serial transfer from the AD7656/AD7657/AD7658 devices, to take the bus out of three- state, and to clock out the MSB of the first conversion result. In the example shown in Figure 34, all 12 ADC channels are simultaneously sampled. Two DOUT lines are used to read the conversion results in this example. CS frames a 96 SCLK transfer. During the first 48 SCLKs, the conversion data is transferred from Device 2 to Device 1. DOUT A on Device 2 transfers conversion data from V1, V2, and V5 into DCIN A in Device 1. DOUT B on Device 2 transfers conversion results from V3, V4, and V6 to DCIN B in Device 1. During the first 48 SCLKs, Device 1 transfers data into the digital host. DOUT A on Device 1 transfers conversion data from V1, V2, and V5. DOUT B on Device 1 transfers conversion data from V3, V4, and V6. During the last 48 SCLKs, Device 2 clocks out zeros and Device 1 shifts the data clocked in from Device 2 during the first 48 SCLKs into the digital host. This example can also be implemented using six 16 SCLK individually framed transfers if DCEN remains high during the transfers. Figure 35 shows the timing if two AD7656/AD7657/AD7658 devices are configured in daisy-chain mode and are operating with three DOUT lines. Assuming a simultaneous sampling of all 12 inputs occurs, the CS frames a 64 SCLK transfer during the read operation. During the first 32 SCLKs of this transfer, the conversion results from Device 1 are clocked into the digital host and the conversion results from Device 2 are clocked into Device 1. During the last 32 SCLKs of the transfer, the conver- sion results from Device 2 are clocked out of Device 1 and into the digital host. Device 2 clocks out zeros. Standby/Partial Power-Down Modes of Operation Each ADC pair can be individually placed into partial power- down mode by bringing the CONVST x signal low before the falling edge of BUSY. To power the ADC pair back up, the CONVST x signal should be brought high to tell the ADC pair to power up and place the track-and-hold into track mode. After the power-up time from partial power-down has elapsed, the CONVST x signal should receive a rising edge to initiate a valid conversion. In partial power-down mode, the reference buffers remain powered up. While an ADC pair is in partial power- down mode, conversions can still occur on the other ADCs. The AD7656/AD7657/AD7658 have a standby mode whereby the devices can be placed into a low power consumption mode (100 µW maximum). The AD7656/AD7657/AD7658 are placed into standby mode by bringing the logic input STBY low and can be powered up again for normal operation by bringing STBY logic high. The output data buffers are still operational when the AD7656/AD7657/AD7658 are in standby mode, meaning the user can continue to access the conversion results of the parts. This standby feature can be used to reduce the average power consumed by the AD7656/AD7657/AD7658 when operating at lower throughput rates. The parts can be placed into standby at the end of each conversion when BUSY goes low and taken out of standby again prior to the next conversion. The time for the AD7656/AD7657/AD7658 to come out of standby is called the wake-up time. The wake- up time limits the maximum throughput rate at which the AD7656/AD7657/AD7658 can operate when powering down between conversions. See the Specifications section. |
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