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MCP73844 Datasheet(PDF) 17 Page - Microchip Technology |
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MCP73844 Datasheet(HTML) 17 Page - Microchip Technology |
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17 / 26 page ![]() 2003-2013 Microchip Technology Inc. DS21823D-page 17 MCP73841/2/3/4 Worst-case VGS with a 5V, ±10% input voltage source and a maximum sink voltage of 1.0V is: At this worst-case (VGS) the RDSON of the MOSFET must be low enough as to not impede the performance of the charging system. The maximum allowable RDSON at the worst-case VGS is: The Fairchild NDS8434 and International Rectifier IRF7404 both satisfy these requirements. 6.1.1.3 EXTERNAL CAPACITORS The MCP7384X are stable with or without a battery load. In order to maintain good AC stability in the Constant-Voltage mode, a minimum capacitance of 4.7 µF is recommended to bypass the VBAT pin to VSS. This capacitance provides compensation when there is no battery load. Additionally, the battery and interconnections appear inductive at high frequencies. These elements are in the control feedback loop during Constant-Voltage mode. Therefore, the bypass capacitance may be necessary to compensate for the inductive nature of the battery pack. Virtually any good quality output filter capacitor can be used, independent of the capacitor’s minimum ESR (Effective Series Resistance) value. The actual value of the capacitor and its associated ESR depends on the forward transconductance (gm) and capacitance of the external pass transistor. A 4.7 µF tantalum or aluminum electrolytic capacitor at the output is usually sufficient to ensure stability for up to a 1A output current. 6.1.1.4 REVERSE-BLOCKING PROTECTION The optional reverse-blocking protection diode, depicted in Figure 6-1, provides protection from a faulted or shorted input, or from a reversed-polarity input source. Without the protection diode, a faulted or shorted input would discharge the battery pack through the body diode of the external pass transistor. If a reverse-protection diode is incorporated into the design, it should be chosen to handle the fast charge current continuously at the maximum ambient temperature. In addition, the reverse-leakage current of the diode should be kept as small as possible. 6.1.1.5 ENABLE INTERFACE In the stand-alone configuration, the enable pin is generally tied to the input voltage. The MCP7384X automatically enters a Low-power mode when voltage on the VDD input falls below the undervoltage lockout voltage (VSTOP), reducing the battery drain current to 0.4 µA, typically. 6.1.1.6 CHARGE STATUS INTERFACE A status output provides information on the state of charge. The current-limited, open-drain output can be used to illuminate an external LED. Refer to Table 5-1 for a summary of the state of the status output during a charge cycle. 6.2 PCB Layout Issues For optimum voltage regulation, place the battery pack as close as possible to the device’s VBAT and VSS pins. This is recommended to minimize voltage drops along the high current-carrying PCB traces. If the PCB layout is used as a heatsink, adding many vias around the external pass transistor can help conduct more heat to the back plane of the PCB, thus reducing the maximum junction temperature. V GS 1.0V 4.5V 120mV – – 3.38V – == R DSON V DDMIN V FC SMAX – V BATMAX – I REGMAX ------------------------------------------------------------------------------- = R DSON 4.5V 120 115 mV – 4.221V – 551 581 mA ------------------------------------------------------------------------- 288m == |
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