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DAC8420FSZ2 Datasheet(PDF) 7 Page - Analog Devices |
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DAC8420FSZ2 Datasheet(HTML) 7 Page - Analog Devices |
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7 / 24 page  DAC8420 Rev. B | Page 7 of 24 CS SDI CLK LD DATA LOAD SEQUENCE SDI CLK CS LD VOUTx DATA LOAD TIMING CLSEL CLR VOUT CLEAR TIMING tCLRW ±1LSB tS tLD2 tCSH tCSS tLD1 A1 A0 X X D11 D10 D9 D8 D4 D3 D2 D1 D0 tDS tDH tCH tCL tCSH tLD2 tLDW tS ±1LSB Figure 2. Timing Diagram 10kΩ 10µF 0.1µF +10V 1N4001 + 10kΩ 10µF 0.1µF –10V 1N4001 + 10kΩ 10µF 0.1µF +15V 1N4001 + 10kΩ 10µF 0.1µF –15V 1N4001 + 5kΩ 5kΩ 10kΩ NC NC NC NC NC NC = NO CONNECT DUT 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 Figure 3. Burn-In Diagram |
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