Electronic Components Datasheet Search
  English  ▼

X  

LAN8710AI Datasheet(PDF) 12 Page - SMSC Corporation

Part # LAN8710AI
Description  Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Technology
PDF  82 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

LAN8710AI Datasheet(HTML) 12 Page - SMSC Corporation

Back Button LAN8710AI Datasheet HTML 8Page - SMSC Corporation LAN8710AI Datasheet HTML 9Page - SMSC Corporation LAN8710AI Datasheet HTML 10Page - SMSC Corporation LAN8710AI Datasheet HTML 11Page - SMSC Corporation LAN8710AI Datasheet HTML 12Page - SMSC Corporation LAN8710AI Datasheet HTML 13Page - SMSC Corporation LAN8710AI Datasheet HTML 14Page - SMSC Corporation LAN8710AI Datasheet HTML 15Page - SMSC Corporation LAN8710AI Datasheet HTML 16Page - SMSC Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 12 / 82 page
background image
Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR® Technology
Datasheet
Revision 1.4 (08-23-12)
12
SMSC LAN8710A/LAN8710Ai
DATASHEET
1
Receive Error
RXER
VO8
This signal is asserted to indicate that an error
was detected somewhere in the frame presently
being transferred from the transceiver.
Note:
This signal is optional in RMII Mode.
Receive
Data 4
(MII Mode)
RXD4
VO8
In Symbol Interface (5B Decoding) mode, this
signal is the MII Receive Data 4 signal, the MSB
of the received 5-bit symbol code-group.
Note:
Unless configured to the Symbol
Interface mode, this pin functions as
RXER.
PHY Address
0
Configuration
Strap
PHYAD0
VIS
(PD)
Combined with PHYAD1 and PHYAD2, this
configuration strap sets the transceiver’s SMI
address.
See Note 2.1 for more information on
configuration straps.
Note:
Refer to Section 3.7.1, "PHYAD[2:0]:
PHY Address Configuration," on
page 36 for additional information.
1
Receive
Clock
(MII Mode)
RXCLK
VO8
In MII mode, this pin is the receive clock output.
MII (100BASE-TX): 25MHz
MII (10BASE-T): 2.5MHz
PHY Address
1
Configuration
Strap
PHYAD1
VIS
(PD)
Combined with PHYAD0 and PHYAD2, this
configuration strap sets the transceiver’s SMI
address.
See Note 2.1 for more information on
configuration straps.
Note:
Refer to Section 3.7.1, "PHYAD[2:0]:
PHY Address Configuration," on
page 36 for additional information.
1
Receive Data
Valid
RXDV
VO8
Indicates that recovered and decoded data is
available on the RXD pins.
Table 2.1 MII/RMII Signals (continued)
NUM PINS
NAME
SYMBOL
BUFFER
TYPE
DESCRIPTION



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com