HT69F50A datasheet(2/202 Pages) HOLTEK

2 / 202 page

Rev. 1.00

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Rev. 1.00

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HT69F30A/HT69F40A/HT69F50A

TinyPowerTM I/O Flash 8-Bit MCU with LCD & EEPROM

HT69F30A/HT69F40A/HT69F50A

TinyPowerTM I/O Flash 8-Bit MCU with LCD & EEPROM

Table of Contents

Features............................................................................................................ 6

CPU Featu�es ......................................................................................................................... 6

Pe�ip�e�al Featu�es................................................................................................................. 6

General Description......................................................................................... 7

Selection Table................................................................................................. 7

Block Diagram.................................................................................................. 8

Pin Assignment................................................................................................ 9

Pin Description .............................................................................................. 13

Absolute Maximum Ratings.......................................................................... 24

D.C. Characteristics....................................................................................... 25

A.C. Characteristics....................................................................................... 28

LVD & LVR Electrical Characteristics .......................................................... 29

LCD D.C. Characteristics .............................................................................. 30

Power-on Reset Characteristics................................................................... 31

System Architecture...................................................................................... 31

Clo�king and Pipelining......................................................................................................... �1

P�og�am Counte�................................................................................................................... ��

Sta�k ..................................................................................................................................... ��

A�it�meti� and Logi� Unit – ALU ........................................................................................... ��

Flash Program Memory................................................................................. 34

St�u�tu�e................................................................................................................................ �4

Spe�ial Ve�to�s ..................................................................................................................... �5

Look-up Table........................................................................................................................ �5

Table P�og�am Example........................................................................................................ �5

In Ci��uit P�og�amming – ICP ............................................................................................... �6

On-C�ip Debug Suppo�t – OCDS ......................................................................................... �7

Data Memory .................................................................................................. 38

St�u�tu�e................................................................................................................................ �8

Gene�al Pu�pose Data �emo�y ............................................................................................ ��

Spe�ial Pu�pose Data �emo�y ............................................................................................. ��

Special Function Register Description........................................................ 43

Indi�e�t Add�essing Registe�s – IAR0� IAR1 ......................................................................... 4�

�emo�y Pointe�s – �P0� �P1 .............................................................................................. 4�

Bank Pointe� – BP................................................................................................................. 44

A��umulato� – ACC............................................................................................................... 45

P�og�am Counte� Low Registe� – PCL.................................................................................. 45

Look-up Table Registe�s – TBLP� TBHP� TBLH..................................................................... 45

Status Registe� – STATUS.................................................................................................... 46

HT69F50A Datasheet(PDF) 2 Page - Holtek Semiconductor Inc

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