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SPBT2532C2.AT2 Datasheet(PDF) 8 Page - STMicroelectronics |
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SPBT2532C2.AT2 Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 27 page ![]() Software architecture SPBT2532C2.AT2 8/27 Doc ID 023461 Rev 1 4 Software architecture 4.1 Lower layer stack ● Bluetooth v2.1 + EDR ● Device power modes: active, sleep and deep sleep ● Wake-on Bluetooth feature optimized power consumption of host CPU ● Authentication and encryption ● Encryption key length from 8 bits to 128 bits ● Persistent Flash memory for BD address and user parameter storage ● All ACL (asynchronous connection less) packet types ● Point-to-point supported ● Master/slave switch supported during connection and post connection ● Dedicated inquiry access code for improved inquiry scan performance ● Dynamic packet selection channel quality driven data rate to optimize link performance ● Dynamic power control ● 802.11b co-existence AFH. 4.2 Upper layer stack: Amp'ed UP ● SPP, IAP, SDAP and GAP protocols ● RFComm, SDP, and L2CAP supported ● Multipoint with simultaneous slaves. 4.3 AT command set: abSerial The complete command list including the iAP commands is reported in the UM1547 user manual. |
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