21

Documentation Changes

Documentation Changes

There are no Documentation Changes in this revision of the Specification Update.

1.

Interupt Redirection

The bit definition for the hardware interrupt redirection has been added. The following changes

will be reflected in the next release of the Datasheet.

REDIRCTL - Redirection Control - (D8:F0)

Address Offset:

4C - 4Fh

Access:

R/W, RO

Size:

32 bits

Default Value:

0000_648Ch

Bit Field

Default & Access

Description

31:14

00001h

Reserved

13

1b

R/W

Interrupt Redirection Algorithm (XTPR).

0 = LRU (least recently used within the lowest priority pool)

1 = highest number in lowest priority pool, default

12:0

048Ch

Reserved