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AT24C128CSSUMB Datasheet(PDF) 11 Page - ATMEL Corporation

Part # AT24C128CSSUMB
Description  I2C-Compatible (2-Wire) Serial EEPROM
PDF  22 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT24C128CSSUMB Datasheet(HTML) 11 Page - ATMEL Corporation

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Atmel AT24C128C [DATASHEET]
8734B–SEEPR–9/2012
9.
Read Operations
Read operations are initiated the same way as write operations with the exception that the read/write select bit in the
device address word is set to one. There are three read operations:
Current Address Read
Random Address Read
Sequential Read
Current Address Read: The internal data word address counter maintains the last address accessed during the last
read or write operation, incremented by one. This address stays valid between operations as long as the chip power is
maintained. The address roll-over during read is from the last byte of the last memory page, to the first byte of the first
page.
Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the
current address data word is serially clocked out. The microcontroller does not respond with an input zero but does
generate a following stop condition (See Figure 9-1).
Figure 9-1. Current Address Read
Random Read: A Random Read requires a dummy byte write sequence to load in the data word address. Once the
device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must
generate another start condition. The microcontroller now initiates a Current Address Read by sending a device address
with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word.
The microcontroller does not respond with a zero but does generate a following stop condition. (See Figure 9-2)
Figure 9-2. Random Read
Note:
* = Don’t care bit
SDA Line
S
T
A
R
T
Device
Address
R
E
A
D
S
T
O
P
M
S
B
A
C
K
R
/
W
N
O
A
C
K
Data
SDA LINE
S
T
A
R
T
S
T
A
R
T
R
E
A
D
W
R
I
T
E
S
T
O
P
Device
Address
Second Word
Address
Device
Address
First Word
Address
Data (n)
M
S
B
A
C
K
A
C
K
A
C
K
L
S
B
A
C
K
N
O
A
C
K
R
/
W
Dummy Write
R
/
W



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