| Electronic Components Datasheet Search |
|
AD8041 Datasheet(PDF) 12 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD8041 Datasheet(HTML) 12 Page - Analog Devices |
|
12 / 16 page ![]() REV. B –12– AD8041 R2 C3 gm2 VOUT R1 C9 gmVi S1N S1P C7 R1 gmVi Figure 6. Small Signal Schematic Disable Operation The AD8041 has an active-low disable pin, which can be used to three-state the output of the part and also lower its supply current. If the disable pin is left floating, the part is enabled and will perform normally. If the disable pin is pulled to 2.5 V (min) below the positive supply, output of the AD8041 will be disabled and the nominal supply current will drop to less than 1.6 mA. For best isolation, the disable pin should be pulled to as low a voltage as possible; ideally, the negative supply rail. The disable pin on the AD8041 allows it to be configured as a 2:1 mux as shown in Figure 7 and can be used to switch many types of high speed signals. Higher order multiplexers can also be built. The break-before-make switching time is approximately 50 ns to disable the output and 300 ns to enable the output. 6 4 7 3 2 AD8041 330 50 10 F 5V 330 8 6 4 7 3 2 AD8041 330 50 10 F 5V 330 8 13 12 11 10 74HC04 50 G = +2 G = +2 CH0 5MHz CH1 10MHz Figure 7. 2:1 Multiplexer 10 0% 100 90 200ns 1V VS = 5V Figure 8. 2:1 Multiplexer Performance Single-Supply A/D Conversion Figure 9 shows the AD8041 driving the analog inputs of the AD9050 in a dc-coupled system with single-ended signals. All components are powered from a single 5 V supply. The AD820 is used to offset the ground referenced input signal to the level required by the AD9050. The AD8041 is used to add in the offset with the ground referenced input signal and buffer the input to AD9050. The nominal input range of the AD9050 is 2.8 V and 3.8 V (1 V p-p centered at 3.3 V). This circuit provides 40 MSPS analog-to-digital conversion on just 330 mW of power while delivering 10-bit performance. 0.1 F 5V AD8041 2.8V – 3.8V 3.3V 5V AD9050 10 9 1k VIN –0.5V TO +0.5V 1k 1k 0.1 F 5V AD820 1k Figure 9. 10-Bit, 40 MSPS A/D Conversion 0 –10 –100 –60 –70 –80 –90 –40 –50 –30 –20 F1 = 4.9MHz FUNDAMENTAL = 0.6dB SECOND HARMONIC = 66.9dB THIRD HARMONIC = 74.7dB SNR = 55.2dB NOISE FLOOR = – 86.1dB ENCODE FREQUENCY = 40MHz Figure 10. FFT Output of Circuit in Figure 9 |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |