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L7986TA Datasheet(PDF) 25 Page - STMicroelectronics |
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L7986TA Datasheet(HTML) 25 Page - STMicroelectronics |
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25 / 43 page  L7986TA Application information Doc ID 022098 Rev 3 25/43 Figure 13. Open-loop gain: module Bode diagram The guidelines for positioning the poles and the zeroes and for calculating the component values can be summarized as follows: 1. Choose a value for R1, usually between 1 kΩ and 5 kΩ, in order to have values of C4 and C5 not comparable with parasitic capacitance of the board. 2. Choose a gain (R4/R1) in order to have the required bandwidth (BW), that means: Equation 30 where fESR is the ESR zero: Equation 31 and Vs is the sawtooth amplitude. The voltage feed-forward keeps the ratio Vs/Vin constant. 3. Calculate C4 by placing the zero one decade below the output filter double pole: Equation 32 R 4 f ESR f LC ------------- ⎝⎠ ⎜⎟ ⎛⎞ 2 BW f ESR ------------- V S V IN --------- R 1 ⋅⋅ ⋅ = f ESR 1 2 π ESR C OUT ⋅⋅ --------------------------------------------------- = C 4 10 2 π R 4 f LC ⋅⋅ ------------------------------------- = |
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