IP1827 datasheet(14/39 Pages) IRF

14 / 39 page

iP1827

Highly Integrated 25A Single‐input Voltage,

Synchronous Buck Regulator

March 5, 2012 | V1.4

97599

Figure 7a: Normal Start up, Device turns on

when the Bus voltage reaches 10.2V

Bus Voltage (12V)

PVcc(5V) or Vcc(3.3V)

Enable > 1.2V

Figure 7b: Recommended startup sequence

with Vcc or PVcc

PRE‐BIAS STARTUP

iP1827 is able to start up into pre‐charged output,

which prevents oscillation and disturbances of the

output voltage.

The output starts in asynchronous fashion and keeps the

synchronous MOSFET off until the first gate signal for

control MOSFET is generated, following which, the

synchronous MOSFET starts with a narrow duty cycle of

12.5% and gradually increases its duty cycle in steps of

12.5%, with 32 cycles at each step until the end of pre‐bias.

[V ]

[T im e]

Pre -Bia s

V o ltage

Figure 8: Pre‐Bias startup

At the end of the pre‐bias stage, the synchronous MOSFET

is switched complementary to the Control MOSFET.

Figure 8 shows a typical Pre‐Bias condition at start up.

HDRv

End of

LDRiss

LDRv

12.5%

25%

87.5%

...

... ...

...

Figure 9: Pre‐Bias startup pulses

SOFT‐START

The iP1827 has a programmable soft‐start to control the

output voltage rise and to limit the current surge at the

start‐up. To ensure correct start‐up, the soft‐start

sequence initiates when the Enable and Vcc rise above

their UVLO thresholds and generate the Power On Ready

(POR) signal. The internal current source (typically 20uA)

charges the external capacitor Css linearly from 0V to Vcc.

Figure 10 shows the waveforms during the soft start.

The start up time can be estimated by:





(1)

0.2

0.8

start



During the soft start the OCP is enabled to protect the

device for any short circuit and over current condition.

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