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ADF4350 Datasheet(PDF) 1 Page - Analog Devices |
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ADF4350 Datasheet(HTML) 1 Page - Analog Devices |
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1 / 4 page ![]() Circuit Note CN-0147 Circuits from the Lab™ tested circuit designs address common design challenges and are engineered for quick and easy system integration. For more information and/or support, visit www.analog.com/CN0147. Devices Connected/Referenced ADF4350 Fractional-N PLL IC with Integrated VCO ADP150 Low Noise 3.3 V LDO Powering a Fractional-N Voltage Controlled Oscillator (VCO) with Low Noise LDO Regulators for Reduced Phase Noise Rev. C Circuitsfromthe Lab™circuitsfromAnalogDeviceshave beendesignedandbuiltbyAnalogDevices engineers. Standard engineering practices have been employed in the design and construction of eachcircuit,andtheirfunctionandperformancehavebeentestedandverifiedinalabenvironmentat room temperature. However, you are solely responsible for testing the circuit and determining its suitabilityandapplicabilityforyouruseandapplication.Accordingly,innoeventshallAnalogDevices be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause whatsoeverconnectedtotheuseofanyCircuitsfromtheLabcircuits. (Continuedonlastpage) One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com/circuits Fax: 781.461.3113 ©2010–2011 Analog Devices, Inc. All rights reserved. EVALUATION AND DESIGN SUPPORT Circuit Evaluation Boards ADF4350 Evaluation Board (EVAL-ADF4350-EB1Z) Design and Integration Files Schematics, Layout Files, Bill of Materials CIRCUIT FUNCTION AND BENEFITS This circuit uses low noise, low dropout (LDO) linear regulators to supply power to a wideband integrated PLL and VCO. Wideband voltage controlled oscillators (VCOs) may have increased sensitivity to power supply noise, hence, ultralow noise regulators are recommended for best performance. The circuit shown in Figure 1 utilizes the ADF4350, a fully integrated fractional-N PLL and VCO that can generate frequencies from 137.5 MHz to 4400 MHz. The ADF4350 is powered from the ultralow noise 3.3 V ADP150 regulator for optimal LO phase noise performance. 2700pF 1200pF 39nF 680 Ω 360 Ω ADF4350 VVCO VVCO CPGND AGND DGND RFOUTB– RFOUTB+ CPOUT 1nF 1nF 4.7k Ω RSET LE DATA CLK REFIN FREFIN VTUNE DVDD AVDD CE MUXOUT 10 28 16 29 1 2 3 22 8 31 9 11 18 21 27 VDD LOCK DETECT 51 Ω AGNDVCO 14 15 19 23 24 25 30 LD 17 20 7 PDBRF 26 SDGND TEMP VCOM VREF 6 32 SDVDD VP 5 SW 10pF 0.1µF 10pF 0.1µF 10pF 0.1µF 4 RFOUTA– RFOUTA+ 13 12 VVCO 3.9nH 3.9nH 1nF 1nF NC = NO CONNECT ADP150 1 2 3 5 4 COUT 1µF CIN 1µF VOUT = 3.3V VIN = 5.5V VOUT NC VIN GND EN OFF ON NC = NO CONNECT ADP150 1 2 3 5 4 COUT 1µF CIN 1µF VOUT = 3.3V VIN = 5.5V VOUT NC VIN GND EN OFF ON Figure 1. ADP150 Regulators Connected to ADF4350 (Simplified Schematic: All Connections and Decoupling Not Shown) |
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