Circuit Note

CN-0259

Rev. B | Page 3 of 5

Table 1. Measured Performance of the Circuit

Performance Specifications at 1.75V p-p FS

Final Results

Cutoff Frequency (−1 dB)

190 MHz

Cutoff Frequency (−3 dB)

210 MHz

Pass-Band Flatness (10 MHz to 190 MHz)

1 dB

SNRFS at 140 MHz

70.1 dBFS

SFDR at 140 MHz

80.9 dBc

H2/H3 at 140 MHz

97.7 dBc/80.9 dBc

Overall Gain at 10 MHz

3.9dB

Input Drive at 10 MHz

4.9 dBm

–40

–35

–30

–25

–20

–15

–10

–5

0

10

100

1000

ANALOG INPUT FREQUENCY (MHz)

Figure 4. Pass-Band Flatness Performance vs. Input Frequency

65

70

75

80

85

ANALOG INPUT FREQUENCY (MHz)

SFDR (dBC)

SNR (dBFS)

Figure 5. SNR/SFDR Performance vs. Input Frequency

Filter and Interface Design Procedure

In this section, a general approach to the design of the

amplifier/ADC interface with filter is presented. To achieve

optimum performance (bandwidth, SNR, SFDR, etc.), there are

certain design constraints placed on the general circuit by the

amplifier and the ADC, such as:

1. The amplifier should see the correct dc load recommended

by the data sheet for optimum performance.

2. The correct amount of series resistance must be used

between the amplifier and the load presented by the filter.

This is to prevent undesired peaking in the pass band.

3. The input to the ADC should be reduced by an external

parallel resistor, and the correct series resistance should be

used to isolate the ADC from the filter. This series resistor

also reduces peaking.

This design approach will tend to minimize the insertion loss of

the filter by taking advantage of the relatively high input impedance

of most high speed ADCs and the relatively low impedance of

the driving source.

Details of the design procedure can be found in the CN-0227

Circuit Note and the CN-0238 Circuit Note.

Circuit Optimization Techniques and Trade-Offs

The parameters in this interface circuit are very interactive;

therefore, it is almost impossible to optimize the circuit for all

key specifications (bandwidth, bandwidth flatness, SNR, SFDR,

gain, etc.). However, the peaking, which often occurs in the

distortion caused by any residual charge injection from the

internal sampling capacitor within the ADC. Increasing this

resistor also tends to reduce bandwidth peaking.

amplifier must drive a larger signal to fill the ADC input range.

Another method for optimizing the pass-band flatness is to vary

the filter shunt capacitor by a small amount.

be selected to make the net ADC input impedance between

200 Ω and 400 Ω. Making it lower reduces the effect of the

ADC input capacitance and may stabilize the filter design, but

increases the insertion loss of the circuit. Increasing the value

will also reduce peaking.

Balancing these trade-offs can be somewhat difficult. In this

design, each parameter was given equal weight; therefore, the

values chosen are representative of the interface performance

for all the design characteristics. In some designs, different

values may be chosen to optimize SFDR, SNR, or input drive

level, depending on system requirements.