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H5TC2G43EFR-RDA Datasheet(PDF) 19 Page - Hynix Semiconductor

Part # H5TC2G43EFR-RDA
Description  2Gb DDR3L SDRAM
PDF  33 Pages
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

H5TC2G43EFR-RDA Datasheet(HTML) 19 Page - Hynix Semiconductor

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Rev. 1.1 / Apr. 2013
19
Table 3 - IDD0 Measurement-Loop Patterna)
a) DM must be driven LOW all the time. DQS, DQS are MID-LEVEL.
b) DQ signals are MID-LEVEL.
Datab)
0
0
ACT
0
0
1
100
00
0
0
0
0
-
1,2
D, D
1
0
0
000
00
0
0
0
0
-
3,4
D, D
1
1
1
100
00
0
0
0
0
-
...
repeat pattern 1...4 until nRAS - 1, truncate if necessary
nRAS
PRE
0
0
1
000
00
0
0
0
0
-
...
repeat pattern 1...4 until nRC - 1, truncate if necessary
1*nRC+0
ACT
0
0
1
1
0
0
00
0
0
F
0
-
1*nRC+1, 2
D, D
1
0
0
0
0
0
00
0
0
F
0
-
1*nRC+3, 4
D, D
1
1
1
100
00
0
0
F
0
-
...
repeat pattern 1...4 until 1*nRC + nRAS - 1, truncate if necessary
1*nRC+nRAS
PRE
0
0
1
0
0
0
00
0
0
F
0
-
...
repeat pattern 1...4 until 2*nRC - 1, truncate if necessary
1
2*nRC
repeat Sub-Loop 0, use BA[2:0] = 1 instead
2
4*nRC
repeat Sub-Loop 0, use BA[2:0] = 2 instead
3
6*nRC
repeat Sub-Loop 0, use BA[2:0] = 3 instead
4
8*nRC
repeat Sub-Loop 0, use BA[2:0] = 4 instead
5
10*nRC
repeat Sub-Loop 0, use BA[2:0] = 5 instead
6
12*nRC
repeat Sub-Loop 0, use BA[2:0] = 6 instead
7
14*nRC
repeat Sub-Loop 0, use BA[2:0] = 7 instead



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