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AD7836ASZ Datasheet(PDF) 3 Page - Analog Devices |
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AD7836ASZ Datasheet(HTML) 3 Page - Analog Devices |
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3 / 12 page  AD7836 –3– REV. A TIMING SPECIFICATIONS1 Parameter Limit at TMIN, TMAX Units Description t1 15 ns min A0, A1, A2 to WR Setup Time t2 0 ns min A0, A1, A2 to WR Hold Time t3 0 ns min CS to WR Setup Time t4 0 ns min WR to CS Hold Time t5 44 ns min WR Pulsewidth t6 15 ns min Data Setup Time t7 4.5 ns min Data Hold Time t8 44 ns min WR Pulse Interval t9 16 µs typ Settling Time t10 300 ns max CLR Pulse Activation Time NOTES 1All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V. 2Rise and fall times should be no longer than 50 ns. Specifications subject to change without notice. (VCC = +5 V 5%; VDD = +15 V 5%; VSS = –15 V 5%; AGND = DGND = 0 V) t2 t1 t3 t4 t5 t8 t6 t7 t9 t10 DATA WR CS VOUT CLR A0, A1, A2 VOUT Figure 1. Timing Diagram |
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