AM3703CUS datasheet(246/280 Pages) TI

246 / 280 page

AM3715, AM3703

SPRS616F

– JUNE 2010 – REVISED AUGUST 2011

www.ti.com

•

MMC2:

– 1.8-V support

– 8-bit without external transceiver

– 4-bit with external transceiver allowing supporting 3-V peripherals. Transceiver direction control

signals are multiplexed with the upper four data bits.

•

MMC3:

– 1.8-V support

– 8-bit without external transceiver

6.6.8.1.1 MMC1 Interface

—SD Identification Modes

Table 6-110 and Table 6-111 assume testing over the recommended operating conditions and electrical

characteristic conditions below.

Table 6-109. MMC1 Interface Timing Conditions

—SD Identification Modes

TIMING CONDITION PARAMETER

VALUE

UNIT

Input Conditions

Input signal rise time

Input signal fall time

Output Condition

CLOAD

Output load capacitance(1)

(1) Buffer strength configuration: LB0 = 0.

Table 6-110. MMC1 Interface Timing Requirements

—SD Identification Modes(1) (2)

NO.

PARAMETER

OPP100

OPP50

UNIT

MIN

MAX

MIN

MAX

MMC1 Interface (1.8-V IO)

SD3

tsu(CMDV-CLKIH)

Setup time, mmc1_cmd valid before mmc1_clk rising

1198.4

clock edge

SD4

th(CLKIH-CMDIV)

Hold time, mmc1_cmd valid after mmc1_clk rising

1249.2

clock edge

MMC1 Interface (3.0-V IO)

SD3

tsu(CMDV-CLKIH)

Setup time, mmc1_cmd valid before mmc1_clk rising

1198.4

clock edge

SD4

th(CLKIH-CMDIV)

Hold time, mmc1_cmd valid after mmc1_clk rising

1249.2

clock edge

(1) Corresponding figures showing timing parameters are common with other interface modes. (See SD , HS SD modes).

(2) See Section 4.3.4, Processor Clocks.

Table 6-111. MMC1 Interface Switching Characteristics

—SD Identification Modes(4) (7)

NO.

PARAMETER

OPP100

OPP50

UNIT

MIN

MAX

MIN

MAX

SD Identification Mode

SD1

tc(clk)

Frequency(1), output clock period

0.4

MHz

SD2

tW(clkH)

Typical pulse duration, output clock high

X(5)*PO(2)

SD2

tW(clkL)

Typical pulse duration, output clock low

Y(6)*PO(2)

tdc(clk)

Duty cycle error, output clock

125

tJ(clk)

Jitter standard deviation(3), output clock

200

MMC1 Interface (1.8-V IO)

tR(clk)

Rise time, output clock

tF(clk)

Fall time, output clock

246

Timing Requirements and Switching Characteristics

Submit Documentation Feedback

Product Folder Link(s): AM3715 AM3703

AM3703CUS Datasheet(PDF) 246 Page - Texas Instruments

AM3703CUS Datasheet(HTML) 246 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL