AM3703CUS datasheet(255/280 Pages) TI

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SWPS038-103

mmc1_clk

mmc1_cmd

mmc1_dat[3:0]

MMC5

MMC6

MMC1

MMC2

AM3715, AM3703

www.ti.com

SPRS616F

– JUNE 2010 – REVISED AUGUST 2011

Figure 6-70. MMC1 Interface

—Standard MMC and MMC Identification Modes—Data/Command Transmit

6.6.8.1.5 MMC1 Interface

—High-Speed MMC Mode

Table 6-122 and Table 6-123 assume testing over the recommended operating conditions and electrical

characteristic conditions below (see Figure 6-71 and Figure 6-72).

Table 6-121. MMC1 Interface Timing Conditions

—High-Speed MMC Mode

TIMING CONDITION PARAMETER

VALUE

UNIT

Input Conditions

Input signal rise time

Input signal fall time

Output Conditions

CLOAD

Output load capacitance(1)

(1) The load setting of the IO buffer: SPEEDCTRL = 1.

Table 6-122. MMC1 Interface Timing Requirements

—High-Speed MMC Mode(2) (3) (4) (5)

NO.

PARAMETER

OPP100

OPP50

UNIT

MIN

MAX

MIN

MAX

MMC1 Interface (1.8-V IO)

MMC3

tsu(CMDV-CLKIH)

Setup time, mmc1_cmd valid before mmc1_clk rising

5.6

26.0

clock edge

MMC4

th(CLKIH-CMDIV)

Hold time, mmc1_cmd valid after mmc1_clk rising

2.3

1.9

clock edge

MMC7

tsu(DATxV-CLKIH)

Setup time, mmc1_dat[n:0](1) valid before mmc1_clk

5.6

26.0

rising clock edge

MMC8

th(CLKIH-DATxIV)

Hold time, mmc1_dat[n:0](1) valid after mmc1_clk

2.3

1.9

rising clock edge

MMC1 Interface (3.0-V IO)

MMC3

tsu(CMDV-CLKIH)

Setup time, mmc1_cmd valid before mmc1_clk rising

5.6

26.0

clock edge

MMC4

th(CLKIH-CMDIV)

Hold time, mmc1_cmd valid after mmc1_clk rising

2.3

1.9

clock edge

MMC7

tsu(DATxV-CLKIH)

Setup time, mmc1_dat[n:0](1) valid before mmc1_clk

5.6

26.0

rising clock edge

MMC8

th(CLKIH-DATxIV)

Hold time, mmc1_dat[n:0](1) valid after mmc1_clk

2.3

1.9

rising clock edge

(1) In mmc1_dat[n:0], n is equal to 3.

(2) Timing parameters are referred to output clock specified in Table 6-123.

(3) The timing requirements are assured for the cycle jitter and duty cycle error conditions specified in Table 6-123.

(4) Corresponding figures showing timing parameters are common with the Standard MMC mode figures.

(5) See Section 4.3.4, Processor Clocks.

Timing Requirements and Switching Characteristics

255

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