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AM3703CUS Datasheet(PDF) 259 Page - Texas Instruments

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Part # AM3703CUS
Description  Sitara ARM Microprocessors
PDF  280 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM3703CUS Datasheet(HTML) 259 Page - Texas Instruments

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SWPS038-096
mmcx_clk
mmcx_cmd
mmcx_dat[n:0]
HSSD4
HSSD8
HSSD3
HSSD7
HSSD1
HSSD2
HSSD2
AM3715, AM3703
www.ti.com
SPRS616F
– JUNE 2010 – REVISED AUGUST 2011
(1) Buffer strength configuration for MMC2 and MMC3: LB0 = 0.
Table 6-128. MMC2 and MMC3 Interfaces Timing Requirements
—High-Speed SDIO Mode(2)
NO.
PARAMETER
OPP100
OPP50
UNIT
MIN
MAX
MIN
MAX
HSSD3
tsu(dV-clkH)
Setup time, mmcx_cmd valid before mmcx_clk rising
3.4
23.8
ns
clock edge
HSSD4
th(clkH-dV)
Hold time, mmcx_cmd valid after mmcx_clk rising
1.7
1.3
ns
clock edge
HSSD7
tsu(dV-clkH)
Setup time, mmcx_dat[n:0](1) valid before mmcx_clk
3.4
23.8
ns
rising clock edge
HSSD8
th(clkH-dV)
Hold time, mmcx_dat[n:0](1) valid after mmcx_clk rising
1.7
1.3
ns
clock edge
(1) In mmcx_dat[n:0], n is equal to 3 for mmc2 and 7 for mmc3.
(2) See Section 4.3.4, Processor Clocks.
Table 6-129. MMC2 and MMC3 Interfaces Switching Characteristics
—High-Speed SDIO Mode(2) (5)
NO.
PARAMETER
OPP100
OPP50
UNIT
MIN
MAX
MIN
MAX
HSSD1
tc(clk)
Frequency(1), output mmcx_clk period
48
24
MHz
HSSD2
tW(clkH)
Typical pulse duration, output mmcx_clk high
0.5*P(3)
0.5*P(3)
ns
HSSD2
tW(clkL)
Typical pulse duration, output mmcx_clk low
0.5*P(3)
0.5*P(3)
ns
tdc(clk)
Duty cycle error, output mmcx_clk
–1042
1042
–2083
2083
ps
tJ(clk)
Jitter standard deviation(4), output mmcx_clk
–65
65
–65
65
ps
HSSD5
td(clkL-doV)
Delay time, mmcx_clk rising clock edge to mmcx_cmd
2.6
13.8
3
34.3
ns
transition
HSSD6
td(clkL-doV)
Delay time, mmcx_clk rising clock edge to
2.6
13.8
3
34.3
ns
mmcx_dat[n:0](2) transition
(1) Related with the output mmcx_clk maximum and minimum frequency.
(2) In mmcx, x = 2 or 3. In mmcx_dat[n:0], n is equal to 3 for mmc2 and 7 for mmc3.
(3) P = output mmcx_clk period in ns.
(4) The jitter probability density can be approximated by a Gaussian function.
(5) See Section 4.3.4, Processor Clocks.
Figure 6-73. MMC2 and MMC3 Interfaces
—High-Speed SDIO Mode—Data/Command Receive(1)
(1) In mmcx, x = 2 or 3. In mmcx_dat[n:0], n is equal to 3 for mmc2 and 7 for mmc3.
Copyright
© 2010–2011, Texas Instruments Incorporated
Timing Requirements and Switching Characteristics
259
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Product Folder Link(s): AM3715 AM3703



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