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LM5066 Datasheet(PDF) 2 Page - Texas Instruments |
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LM5066 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 63 page ![]() 10 9 8 11 12 1 2 3 4 5 7 6 FB RETRY NC PWR GATE SENSE VIN_K NC VIN CL PGD OUT UVLO/EN TIMER 25 26 27 28 21 22 23 24 13 14 19 20 OVLO AGND SDAI GND SDAO ADR2 ADR1 VDD VAUX ADR0 SMBA SCL 18 17 16 15 VREF DIODE OUT UVLO/EN VIN GATE DIODE R1 FB OVLO SDAI SCL PGD SENSE VDD SMBus Interface SMBA CL RETRY VAUX VDD VREF TIMER PWR AGND LM5066 Auxillary ADC Input (0V ± 2.97V) VOUT COUT RPG VIN 1 PF 1 PF RPWR ADR2 ADR1 ADR0 VDD N/C N/C VIN_K GND SDAO RS R2 R3 CTIMER R4 R5 CIN Z1 D1 Q2 Q1 LM5066 SNVS655G – JUNE 2011 – REVISED FEBRUARY 2013 www.ti.com Typical Application Schematic Connection Diagram Solder exposed pad to ground. Top View 28-Lead HTSSOP with Exposed Pad PIN DESCRIPTIONS Pin Name Description Applications Information No. Pad Exposed Pad Exposed pad of HTSSOP Solder to the ground plane to reduce thermal resistance package 1 OUT Output feedback Connect to the output rail (external MOSFET source). Internally used to determine the MOSFET VDS voltage for power limiting, and to monitor the output voltage. 2 GATE Gate drive output Connect to the external MOSFET's gate. 2 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated Product Folder Links: LM5066 |
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