AD394 datasheet(3/12 Pages) AD

3 / 12 page

AD394

Rev. A | Page 3 of 12

SPECIFICATIONS

Table 1. TA = 25°C, VREFIN = 10 V, VS = ±15 V, unless otherwise specified

AD394TD and AD394TD/883B1

Model

Min

Typ

Max

Units

DATA INPUTS (Pins 1-16)2

TTL or 5 V CMOS-Compatible

Input Voltage

Bit ON (Logic 1)

2.4

5.5

Bit OFF (Logic 0)

0.8

Input Current

±4

±40

µA

RESOLUTION

Bits

OUTPUT

Voltage Range3

±VREFIN

Current

STATIC ACCURACY

Gain Error

±0.025

±0.05

% of FSR4

Offset

±0.012

±0.025

% of FSR

Bipolar Zero

±0.012

% of FSR

Integral Linearity Error5

±1/8

±1/2

LSB

Differential Linearity Error

±1/4

±1/2

LSB

TEMPERATURE PERFORMANCE

Gain Drift

±5

ppm FSR/°C

Offset Drift

±5

ppm FSR/°C

Integrated Linearity Error5

TMIN to TMAX

±1/4

±1/2

LSB

Differential Linearity Error

MONOTONICITY GUARANTEED

OVER FULL TEMPERATURE RANGE

REFERENCE INPUTS

Input Resistance

kΩ

Voltage Range

−11

+11

DYNAMIC PERFORMACE

Setting Time (to ±1/2 LSB)

VPREFIN = 10 V, Change All Digital Inputs from 5.0 V

to 0 V

µs

VREFIN = 0 V to 5 V Step, All Digital Inputs = 0 V

µs

Reference Feedthrough Error

See Figure 2

Digital-to-Analog Glitch Impulse6

250

nV-s

Crosstalk

Digital Input (Static)7

0.1

LSB

Reference8

2.0

mV p-p

POWER REQUIREMENTS

Supply Voltage9

±13.5

±16.5

Current (All Digital Inputs 0 V or 5 V)

+VS

−VS

Power Dissipation

570

750

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