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48GA004 Datasheet(PDF) 233 Page - Microchip Technology

Part # 48GA004
Description  28/44-Pin General Purpose, 16-Bit Flash Microcontrollers
PDF  268 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

48GA004 Datasheet(HTML) 233 Page - Microchip Technology

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 2010 Microchip Technology Inc.
DS39881D-page 233
PIC24FJ64GA004 FAMILY
TABLE 27-4:
DC CHARACTERISTICS: OPERATING CURRENT (IDD)
DC CHARACTERISTICS
Standard Operating Conditions: 2.0V to 3.6V (unless otherwise stated)
Operating temperature
-40°C
 TA  +85°C for Industrial
-40°C
 TA  +125°C for Extended
Parameter No.
Typical(1)
Max
Units
Conditions
Operating Current (IDD): PMD Bits are Set(2)
DC20
0.650
0.850
mA
-40°C
2.0V(3)
1 MIPS
DC20a
0.650
0.850
mA
+25°C
DC20b
0.650
0.850
mA
+85°C
DC20c
0.650
0.850
mA
+125°C
DC20d
1.2
1.6
mA
-40°C
3.3V(4)
DC20e
1.2
1.6
mA
+25°C
DC20f
1.2
1.6
mA
+85°C
DC20g
1.2
1.6
mA
+125°C
DC23
2.6
3.4
mA
-40°C
2.0V(3)
4 MIPS
DC23a
2.6
3.4
mA
+25°C
DC23b
2.6
3.4
mA
+85°C
DC23c
2.6
3.4
mA
+125°C
DC23d
4.1
5.4
mA
-40°C
3.3V(4)
DC23e
4.1
5.4
mA
+25°C
DC23f
4.1
5.4
mA
+85°C
DC23g
4.1
5.4
mA
+125°C
DC24
13.5
17.6
mA
-40°C
2.5V(3)
16 MIPS
DC24a
13.5
17.6
mA
+25°C
DC24b
13.5
17.6
mA
+85°C
DC24c
13.5
17.6
mA
+125°C
DC24d
15
20
mA
-40°C
3.3V(4)
DC24e
15
20
mA
+25°C
DC24f
15
20
mA
+85°C
DC24g
15
20
mA
+125°C
DC31
13
17
A-40°C
2.0V(3)
LPRC (31 kHz)
DC31a
13
17
A+25°C
DC31b
20
26
A+85°C
DC31c
40
50
A
+125°C
DC31d
54
70
A-40°C
3.3V(4)
DC31e
54
70
A+25°C
DC31f
95
124
A+85°C
DC31g
120
260
A
+125°C
Note 1:
Data in “Typical” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only and
are not tested.
2:
The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O pin loading
and switching rate, oscillator type, internal code execution pattern and temperature, also have an impact on the
current consumption. The test conditions for all IDD measurements are as follows: OSCI driven with external square
wave from rail to rail. All I/O pins are configured as inputs and pulled to VDD.
MCLR = VDD; WDT and FSCM are disabled. CPU, SRAM, program memory and data memory are operational. No
peripheral modules are operating and all of the Peripheral Module Disable (PMD) bits are set.
3:
On-chip voltage regulator disabled (DISVREG tied to VDD).
4:
On-chip voltage regulator enabled (DISVREG tied to VSS). Low-Voltage Detect (LVD) and Brown-out Detect
(BOD) are enabled.



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