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48GA004 Datasheet(PDF) 234 Page - Microchip Technology

Part # 48GA004
Description  28/44-Pin General Purpose, 16-Bit Flash Microcontrollers
PDF  268 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

48GA004 Datasheet(HTML) 234 Page - Microchip Technology

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PIC24FJ64GA004 FAMILY
DS39881D-page 234
 2010 Microchip Technology Inc.
TABLE 27-5:
DC CHARACTERISTICS: IDLE CURRENT (IIDLE)
DC CHARACTERISTICS
Standard Operating Conditions: 2.0V to 3.6V (unless otherwise stated)
Operating temperature
-40°C
 TA  +85°C for Industrial
-40°C
 TA  +125°C for Extended
Parameter
No.
Typical(1)
Max
Units
Conditions
Idle Current (IIDLE): Core Off, Clock On Base Current, PMD Bits are Set(2)
DC40
150
200
A-40°C
2.0V(3)
1 MIPS
DC40a
150
200
A+25°C
DC40b
150
200
A+85°C
DC40c
165
220
A
+125°C
DC40d
250
325
A-40°C
3.3V(4)
DC40e
250
325
A+25°C
DC40f
250
325
A+85°C
DC40g
275
360
A
+125°C
DC43
0.55
0.72
mA
-40°C
2.0V(3)
4 MIPS
DC43a
0.55
0.72
mA
+25°C
DC43b
0.55
0.72
mA
+85°C
DC43c
0.60
0.8
mA
+125°C
DC43d
0.82
1.1
mA
-40°C
3.3V(4)
DC43e
0.82
1.1
mA
+25°C
DC43f
0.82
1.1
mA
+85°C
DC43g
0.91
1.2
mA
+125°C
DC47
3
4
mA
-40°C
2.5V(3)
16 MIPS
DC47a
3
4
mA
+25°C
DC47b
3
4
mA
+85°C
DC47c
3.3
4.4
mA
+125°C
DC47d
3.5
4.6
mA
-40°C
3.3V(4)
DC47e
3.5
4.6
mA
+25°C
DC47f
3.5
4.6
mA
+85°C
DC47g
3.9
5.1
mA
+125°C
DC50
0.85
1.1
mA
-40°C
2.0V(3)
FRC (4 MIPS)
DC50a
0.85
1.1
mA
+25°C
DC50b
0.85
1.1
mA
+85°C
DC50c
0.94
1.2
mA
+125°C
DC50d
1.2
1.6
mA
-40°C
3.3V(4)
DC50e
1.2
1.6
mA
+25°C
DC50f
1.2
1.6
mA
+85°C
DC50g
1.3
1.8
mA
+125°C
Note 1:
Data in “Typical” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only and
are not tested.
2:
The test conditions for all IIDLE measurements are as follows: OSCI driven with external square wave from rail to
rail. All I/O pins are configured as inputs and pulled to VDD. MCLR = VDD; WDT and FSCM are disabled. CPU,
SRAM, program memory and data memory are operational. No peripheral modules are operating and all of the
Peripheral Module Disable (PMD) bits are set.
3:
On-chip voltage regulator disabled (DISVREG tied to VDD).
4:
On-chip voltage regulator enabled (DISVREG tied to VSS). Low-Voltage Detect (LVD) and Brown-out Detect
(BOD) are enabled.



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