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TLC5618AMFKB Datasheet(PDF) 16 Page - Texas Instruments |
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TLC5618AMFKB Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 24 page ![]() TLC5618, TLC5618A PROGRAMMABLE DUAL 12-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS156G – JULY 1997 – REVISED APRIL 2001 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION changing the latch B data from zero to full code Assuming that latch B starts at zero code (e.g., after power-up), the latch can be filled with 1s by writing (bit D15 on the left, D0 on the right). 0X00 1111 1111 1111 to the serial interface. Bit D14 can be zero to select slow mode or one to select fast mode. The data (bits D0 to D11) are written to both the double buffer and latch B. The latch A contents and the DAC A output are not changed by this write. double-buffered change of both DAC outputs Assuming that DACs A and B start at zero code (e.g., after power-up), if DAC A is to be driven to mid-scale and DAC B to full-scale, and if the outputs are to begin rising at the same time, this can be achieved as follows: First, 0d01 1111 1111 1111 is written (bit D15 on the left, D0 on the right) to the serial interface. This loads the full-scale code into the double buffer but does not change the latch B contents and the DAC B output voltage. The latch A contents and the DAC A output are also unaffected by this write operation. Changing from fast to slow or slow to fast mode changes the supply current which can glitch the outputs, and so D14 (designated by d in the above data word) should be set to maintain the speed mode set by the previous write. Next, 1X0X 1000 0000 0000 is written (bit D15 on the left, D0 on the right) to the serial interface. Bit D14 can be zero to select slow mode or one to select fast mode. The other X can be zero or one (don’t care). This writes the mid-scale code (100000000000) to latch A and also copies the full-scale code from the double buffer to latch B. Both DAC outputs thus begin to rise after the second write. DSP serial interface Utilizing a simple 3-wire serial interface shown in Figure 22, the TLC5618A can be interfaced to TMS320 compatible serial ports. The 5618A has an internal state machine that will count 16 clocks after receiving a falling edge of CS and then disable further clocking in of data until the next falling edge is received on CS. Therefore CS can be connected directly to the FS pins of the serial port and only the leading falling edge of the DSP will be used to start the write process. The TLC5618A is designed to be used with the TMS320Cxx DSP in burst mode serial port transmit operation. |
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