TLC5618, TLC5618A

PROGRAMMABLE DUAL 12-BIT DIGITAL-TO-ANALOG CONVERTERS

SLAS156G – JULY 1997 – REVISED APRIL 2001

17

POST OFFICE BOX 655303

APPLICATION INFORMATION

SCLK

DIN

CS

TLC5618A

CLKX

DX

FSX

TMS320C203

DSP

VCC

OUT A

OUT B

GND

REFIN

2.5 V dc

FSR

To Source

Ground

Analog

Output

Analog

Output

CLKR

Figure 22. Interfacing The TLC5618A to the TMS320C203 DSP

general serial interface

Both the TLC5618 and TLC5618A are compatible with SPI, QSPI, or Microwire serial standards. The hardware

connections are shown in Figures 23 and 24. The TLC5618A has an internal state machine that will count 16

clocks after the falling edge of CS and then internally disable the device. The internal edge is ORed together

with CS so that the rising edge can be provided to CS prior to the occurrence of the internal edge to also disable

the device.

The SPI and Microwire interfaces transfer data in 8-bit bytes, therefore, two write cycles are required to input

data to the DAC. The QSPI interface, which has a variable input data length from 8 to 16 bits, can load the DAC

input register in one write cycle.

SCLK

DIN

CS

TLC5618,

TLC5618A

SK

SO

I/O

Microwire

Port

Figure 23. Microwire Connection