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SP6655 Datasheet(PDF) 3 Page - Sipex Corporation |
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SP6655 Datasheet(HTML) 3 Page - Sipex Corporation |
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3 / 16 page ![]() 3 Date: 09/27/05 SP6655 High Efficiency 400mA Synchronous Buck Regulator © Copyright 2004 Sipex Corporation PIN DESCRIPTION PIN NUMBER PIN NAME DESCRIPTION 1PVIN Input voltage power pin. Inductor charging current passes through this pin. 2VIN Internal supply voltage. Control circuitry powered from this pin. 3 BLON Open drain battery low output. (V IN-VO) less than 300mV pulls this node to ground. (V IN-VO) above threshold, this node is open. 4D1 Digital mode control input. See table I for definition. 5D0 Digital mode control input. See table I for definition. 6FB External feedback network input connection. Connect a resistor from FB to ground and FB to V OUT to set the output voltage. This pin regulates to the internal bandgap reference voltage of 0.8V. 7VOUT Output voltage sense pin. Used by the timing circuit to set minimum on and off times. 8 GND Internal ground pin. Control circuitry returns current to this pin. 9PGND Power ground pin. Synchronous rectifier current returns through this pin. 10 LX Inductor switching node. Inductor tied between this pin and the output capacitor to create regulated output voltage. FUNCTIONAL DIAGRAM D1 D0 00 Shutdown. All internal circuitry is disabled and the power switches are opened. 01 Device enabled, falling UVLO threshold =2.70V 10 Device enabled, falling UVLO threshold =2.85V 11 Device enabled, falling UVLO threshold =3.00V Table 1. Operating Mode Definition V IN Zero_X DRVON Q R Q S Min Ton BLON D0 P VIN OVR_I MIN Ton OVR_I K OFF/VOUT V IN LX T OFF = UVLO BLANK = T BLANK(=100ns) or TOFF = KOFF/VOUT V OUT ILIM/M REF 1 VOLOW _ FB +- V RAMP RST P GND TSD BLANK + - 300mV + - C UVLO Internal Supply REF' OVR_I V OUT + - C DRVON BLANK ILIM/M D1 VOLOW + - C T ONOVER Min T ON = KON/(VIN -VOUT) Ref One-Shot DRVON + - C Block FB' GND REF M +- Vos DRIVER DRVON =100ns T ONOVER |
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