APW7153 datasheet(7/20 Pages) ANPEC

7 / 20 page

Rev. A.6 - Aug., 2012

APW7153/A/B

www.anpec.com.tw

Pin Description

TDFN3x3-10

SOP-8P

APW7153

APW7153A APW7153B

APW7153

NAME

FUNCTION

SHDN/RT

Shutdown/Enable and Oscillator Input. Connecting a resistor to

GND sets the switching Frequency. Pull the pin to VDD to shut

down the device. Do leave the pin floating.

EN/RT

Shutdown/Enable and Oscillator Input. Connecting a resistor to

VDD sets the switching Frequency. Pull the pin to GND to shut

down the device. Do leave the pin floating.

GND

Signal Ground. Ground of MOSFET Gate Drivers and Control

Circuitry.

3, 4

Power Switching Output. LX is the Junction of the high-side and

low-side Power MOSFETs to supply power to the output LC filter.

PGND

Power Ground. The Source of the N-channel power MOSFET.

Connect this pin to the system ground with lowest impedance.

6, 7

PVDD

Power Input. PVDD supplies the step-down converter switches.

Connecting a ceramic bypass capacitor from PVDD to PGND to

eliminate switching noise and voltage ripple on the input to the IC.

VDD

Control circuitry supply Input. VDD supplies the control circuitry,

gate drivers. Connecting a ceramic bypass capacitor from VDD to

GND to eliminate switching noise and voltage ripple on the input

to the IC.

POK

Power Good Output. This pin is open-drain logic output that is

pulled to ground when the output voltage is not within ±

12.5% of

regulation point.

Output Feedback Input. The APW7153/A senses the feedback

voltage via FB and regulates the voltage at 0.8V. Connecting FB

with a resistor-divider from the converter’s output sets the output

voltage.

COMP

Output of the error amplifier. Connect a series RC network from

COMP to GND to compensate the regulation control loop. In

some cases, an additional capacitor from COMP to GND is

required.

Exposed

Pad

Connect the exposed pad to the system ground plan with large

copper area for dissipating heat into the ambient air.

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