AD538 datasheet(13/17 Pages) AD

13 / 17 page

AD538

Rev. E | Page 12 of 16

TWO-QUADRANT DIVISION

The two-quadrant linear divider circuit illustrated in Figure 14

uses the same basic connections as the one-quadrant version.

However, in this circuit the numerator has been offset in the

positive direction by adding the denominator input voltage

to it. The offsetting scheme changes the divider’s transfer

function from













(

)

























where:













kΩ

As long as the magnitude of the denominator input is equal

to or greater than the magnitude of the numerator input, the

circuit accepts bipolar numerator voltages. However, under

the conditions of a 0 V numerator input, the output would

incorrectly equal +14 V. The offset can be removed by connecting

the 10 V reference through Resistors R1 and R2 to the output

section’s summing Node I at Pin 9 thus providing a gain of 1.4

at the center of the trimming potentiometer. The potentiometer,

R2, adjusts out or corrects this offset, leaving the desired

transfer function of 10 V (VZ/VX).

25k

Ω

35k

Ω

10k

Ω

12.4k

Ω

25k

Ω

35k

Ω

100

Ω

25k

Ω

25k

Ω

ANTILOG

LOG

OUTPUT

ZERO

ADJUST

100

Ω

AD538

IN4148

LOG

RATIO

INTERNAL

VOLTAGE

REFERENCE

SIGNAL

GND

PWR

GND

+10V

+2V

OUTPUT

VO = 10

FOR VX ≥ VZ

10M

Ω

VOS

3.9M

Ω

ADJ

68k

Ω

–1.2V

AD589

–VS

NUMERATOR

DENOMINATOR

OPTIONAL

Z OFFSET TRIM

+15V

–15V

Figure 14. Two-Quadrant Division with 10 V Scaling

LOG RATIO OPERATION

Figure 15 shows the AD538 configured for computing the log

of the ratio of two input voltages (or currents). The output

signal from B is connected to the summing junction of the

output amplifier via two series resistors. The 90.9 Ω metal film

resistor effectively degrades the temperature coefficient of the

±3500 ppm/°C resistor to produce a 1.09 kΩ +3300 ppm/°C

equivalent value. In this configuration, the VY input must

be tied to some voltage less than zero (−1.2 V in this case)

removing this input from the transfer function.

The 5 kΩ potentiometer controls the circuit’s scale factor

adjustment providing a +1 V per decade adjustment. The

output offset potentiometer should be set to provide a zero

output with VX = VZ = 1 V. The input VZ adjustment should

be set for an output of 3 V with VZ = l mV and VX = 1 V.

25k

Ω

AD589

68k

Ω

OPTIONAL

INPUT VOS

ADJUSTMENT

10M

Ω

–1.2V

–VS

25k

Ω

100

Ω

90.9

Ω

+3500

ppm/°C

25k

Ω

25k

Ω

ANTILOG

LOG

OUTPUT

100

Ω

48.7

Ω

AD538

IN4148

LOG

RATIO

INTERNAL

VOLTAGE

REFERENCE

SIGNAL

GND

PWR

GND

+15V

–15V

+10V

+2V

OUTPUT

INPUT

Ω

SCALE

FACTOR

ADJUST

OPTIONAL

OUTPUT VOS

ADJUSTMENT

Ω

+VS

–VS

10k

Ω

10M

Ω

VO = 1V LOG10

Figure 15. Log Ratio Circuit

The log ratio circuit shown achieves ±0.5% accuracy in the log

domain for input voltages within three decades of input range:

10 mV to 10 V. This error is not defined as a percent of full-

scale output, but as a percent of input. For example, using a

1 V/decade scale factor, a 1% error in the positive direction

at the input of the log ratio amplifier translates into a 4.3 mV

deviation from the ideal OUTPUT (that is, 1 V × log10 (1.01) =

4.3214 mV). An input error 1% in the negative direction is

slightly different, giving an output deviation of 4.3648 mV.

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