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18F8680 Datasheet(PDF) 176 Page - Microchip Technology |
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18F8680 Datasheet(HTML) 176 Page - Microchip Technology |
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176 / 496 page  PIC18F6585/8585/6680/8680 DS30491C-page 174 2004 Microchip Technology Inc. The maximum PWM resolution (bits) for a given PWM frequency is given by the following equation. EQUATION 15-3: 15.4.3 SETUP FOR PWM OPERATION The following steps should be taken when configuring the CCP module for PWM operation: 1. Set the PWM period by writing to the PR2 register. 2. Set the PWM duty cycle by writing to the CCPRxL register and CCPxCON<5:4> bits. 3. Make the CCPx pin an output by clearing corresponding TRIS bit. 4. Set the TMR2 prescale value and enable Timer2 by writing to T2CON. 5. Configure the CCPx module for PWM operation. TABLE 15-4: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz TABLE 15-5: REGISTERS ASSOCIATED WITH PWM AND TIMER2 Note: If the PWM duty cycle value is longer than the PWM period, the CCP1 pin will not be cleared. FOSC FPWM --------------- log 2 () log -----------------------------bits = PWM Resolution (max) PWM Frequency 2.44 kHz 9.76 kHz 39.06 kHz 156.3 kHz 312.5 kHz 416.6 kHz Timer Prescaler (1, 4, 16) 16 4 1 1 1 1 PR2 Value 0FFh 0FFh 0FFh 3Fh 1Fh 17h Maximum Resolution (bits) 10 10 10 8 7 5.5 Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other Resets INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u PIR1 PSPIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 PIE1 PSPIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 IPR1 PSPIP ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 1111 1111 1111 1111 TRISC PORTC Data Direction Register 1111 1111 1111 1111 TMR2 Timer2 Module Register 0000 0000 0000 0000 PR2 Timer2 Module Period Register 1111 1111 1111 1111 T2CON — TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000 CCPR1L Capture/Compare/PWM Register 1 (LSB) xxxx xxxx uuuu uuuu CCPR1H Capture/Compare/PWM Register 1 (MSB) xxxx xxxx uuuu uuuu CCP1CON P1M1 P1M0 DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 0000 0000 0000 0000 CCPR2L Capture/Compare/PWM Register 2 (LSB) xxxx xxxx uuuu uuuu CCPR2H Capture/Compare/PWM Register 2 (MSB) xxxx xxxx uuuu uuuu CCP2CON — — DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000 Legend: x = unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used by PWM and Timer2. |
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