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18F8680 Datasheet(PDF) 174 Page - Microchip Technology

Part # 18F8680
Description  64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module
PDF  496 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

18F8680 Datasheet(HTML) 174 Page - Microchip Technology

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PIC18F6585/8585/6680/8680
DS30491C-page 172
 2004 Microchip Technology Inc.
TABLE 15-3:
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1 AND TIMER3
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
INTCON
GIE/
GIEH
PEIE/
GIEL
TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
0000 000x 0000 000u
PIR1
PSPIF
ADIF
RCIF
TXIF
SSPIF
CCP1IF
TMR2IF
TMR1IF
0000 0000 0000 0000
PIE1
PSPIE
ADIE
RCIE
TXIE
SSPIE
CCP1IE
TMR2IE
TMR1IE
0000 0000 0000 0000
IPR1
PSPIP
ADIP
RCIP
TXIP
SSPIP
CCP1IP
TMR2IP
TMR1IP
1111 1111 1111 1111
TRISD
PORTD Data Direction Register
1111 1111 1111 1111
TMR1L
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
xxxx xxxx uuuu uuuu
TMR1H
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
xxxx xxxx uuuu uuuu
T1CON
RD16
—
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
TMR1CS
TMR1ON 0-00 0000 u-uu uuuu
CCPR1L
Capture/Compare/PWM Register 1 (LSB)
xxxx xxxx uuuu uuuu
CCPR1H
Capture/Compare/PWM Register 1 (MSB)
xxxx xxxx uuuu uuuu
CCP1CON
P1M1
P1M0
DC1B1
DC1B0
CCP1M3
CCP1M2
CCP1M1
CCP1M0 0000 0000 0000 0000
PIR2
—
CMIF
—
EEIF
BCLIF
LVDIF
TMR3IF
CCP2IF
-0-0 0000 -0-0 0000
PIE2
—
CMIE
—
EEIE
BCLIE
LVDIE
TMR3IE
CCP2IE
-0-0 0000 -0-0 0000
IPR2
—
CMIP
—
EEIP
BCLIP
LVDIP
TMR3IP
CCP2IP
-1-1 1111 -1-1 1111
TMR3L
Holding Register for the Least Significant Byte of the 16-bit TMR3 Register
xxxx xxxx uuuu uuuu
TMR3H
Holding Register for the Most Significant Byte of the 16-bit TMR3 Register
xxxx xxxx uuuu uuuu
T3CON
RD16
T3CCP2
T3CKPS1 T3CKPS0
T3CCP1
T3SYNC
TMR3CS
TMR3ON 0000 0000 uuuu uuuu
Legend:
x
= unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by capture and Timer1.



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