18F8680 datasheet(170/496 Pages) MICROCHIP

170 / 496 page

PIC18F6585/8585/6680/8680

DS30491C-page 168

 2004 Microchip Technology Inc.

CCP2CON REGISTER

U-0

R/W-0

—

DC2B1

DC2B0

CCP2M3

CCP2M2

CCP2M1

CCP2M0

bit 7

bit 0

bit 7-6

Unimplemented: Read as ‘0’

bit 5-4

DC2B1:DC2B0: PWM Duty Cycle bit 1 and bit 0

Capture mode:

Unused.

Compare mode:

Unused.

PWM mode:

These bits are the two LSbs of the 10-bit PWM duty cycle. The eight MSbs of the duty cycle are

found in CCPR2L.

bit 3-0

CCP2M3:CCP2M0: CCP2 Mode Select bits

0000

= Capture/Compare/PWM off (resets CCP2 module)

0001

= Reserved

0010

= Compare mode, toggle output on match

0011

= Reserved

0100

= Capture mode, every falling edge

0101

= Capture mode, every rising edge

0110

= Capture mode, every 4th rising edge

0111

= Capture mode, every 16th rising edge

1000

= Compare mode, initialize CCP pin low, on compare match force CCP pin high

1001

= Compare mode, initialize CCP pin high, on compare match force CCP pin low

1010

= Compare mode, generate software interrupt only, CCP pin is unaffected

1011

= Compare mode, trigger special event, resets TMR1 or TMR3 and starts A/D conversion

if A/D module is enabled

11xx

= PWM mode

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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