Product Specification

PE9313

Page 2 of 7

©2003-2006 Peregrine Semiconductor Corp. All rights reserved.

Document No. 70-0120-03

│ UltraCMOS™ RFIC Solutions

Table 2. Pin Descriptions

Table 3. Absolute Maximum Ratings

Device Functional Considerations

The PE9313 divides an input signal, up to a

frequency of 1500 MHz, by a factor of eight

thereby producing an output frequency at an

eighth of the input frequency. To work properly at

higher frequency, the input and output signals

(pins 2 & 7) must be AC coupled via an external

capacitor, as shown in the test circuit in Figure 7.

The input may be DC coupled for low frequency

operation with care taken to remain within the

specified DC input range for the device.

The ground pattern on the board should be made

as wide as possible to minimize ground

impedance. See Figure 8 for a layout example.

Figure 3. Pin Configuration

PE9313

1

2

3

4

8

7

6

5

IN

GND

N/C

GND

OUT

NC

GND

Pin No.

Pin

Name

Description

1

Power supply pin. Bypassing is required

(eg 1000 pF & 100 pF).

2

IN

Input signal pin. Should be coupled with a

capacitor (eg 1000 pF).

3

NC

No connection. This pin should be left

open.

4

GND

Ground pin. Ground pattern on the board

should be as wide as possible to reduce

ground impedance.

5

GND

Ground pin.

6

NC

No connection. This pin should be left

open.

7

OUT

Divided frequency output pin. This pin

should be coupled with a capacitor

(eg 1000 pF).

8

GND

Ground Pin.

Symbol

Parameter/Conditions

Min

Max

Units

Supply voltage

4.0

V

Input Power

15

dBm

Voltage on input

-0.3

+0.3

V

Storage temperature range

-65

150

°C

Operating temperature range

-40

85

°C

ESD voltage (Human Body

Model, MIL-STD 883)

1000

V

Electrostatic Discharge (ESD) Precautions

When handling this UltraCMOS™ device, observe

the same precautions that you would use with

other ESD-sensitive devices. Although this device

contains circuitry to protect it from damage due to

ESD, precautions should be taken to avoid

exceeding the rating specified in Table 3.

Latch-Up Avoidance

Unlike conventional CMOS devices, UltraCMOS™

devices are immune to latch-up.

Absolute Maximum Ratings are those values

listed in the above table. Exceeding these values

may cause permanent device damage.