5804 datasheet(4/8 Pages) ALLEGRO

4 / 8 page

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

5804

BiMOS II UNIPOLAR

STEPPER-MOTOR

TRANSLATOR/DRIVER

WAVE-DRIVE SEQUENCE

Half Step = L, One Phase = H

Step

ABCD

POR

OFF

TWO-PHASE DRIVE SEQUENCE

Half Step = L, One Phase = L

Step

ABCD

POR

OFF

HALF-STEP DRIVE SEQUENCE

Half Step = H, One Phase = L

Step

ABCD

POR

OFF

APPLICATIONS INFORMATION

Internal power-on reset (POR) circuitry resets

OUTPUTA (and OUTPUTD in the two-phase

drive format) to the on state with initial applica-

tion of the logic supply voltage. After reset, the

circuit then steps according to the tables.

The outputs will advance one sequence

position on the high-to-low transition of the STEP

INPUT pulse. Logic levels on the HALF-STEP

and ONE-PHASE inputs will determine the drive

format (one-phase, two-phase, or half-step). The

DIRECTION pin determines the rotation se-

quence of the outputs. Note that the STEP

INPUT must be in the low state when changing

the state of ONE-PHASE, HALF-STEP, or

DIRECTION to prevent erroneous stepping.

All outputs are disabled (off) when OUTPUT

ENABLE is at a logic high. If the function is not

required, OUTPUT ENABLE should be tied low.

In that condition, all outputs depend only on the

state of the step logic.

During normal commutation of a unipolar

stepper motor, mutual coupling between the

motor windings can force the outputs of the

UCN5804B below ground. This condition will

cause forward biasing of the collector-to-substrate

junction and source current from the output. For

many L/R applications, this substrate current is

high enough to adversely affect the logic circuitry

and cause misstepping. External series diodes

(Schottky are recommended for increased

efficiency at low-voltage operation) will prevent

substrate current from being sourced through the

outputs. Alternatively, external ground clamp

diodes will provide a preferred current path from

ground when the outputs are pulled below ground.

Internal thermal protection circuitry disables

all outputs when the junction temperature reaches

approximately 165

°C. The outputs are enabled

again when the junction cools down to approxi-

mately 145

°C.

5804 Datasheet(PDF) 4 Page - Allegro MicroSystems

5804 Datasheet(HTML) 4 Page - Allegro MicroSystems

Html Pages

1 2 3 4 5 6 7 8

Datasheet Download

Link URL