LM3445M datasheet(24/39 Pages) TI

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VBUCK

8.33 ms

30°

150°

180°

0°

VVF-CAP =

VAC(MAX)

#stages

LM3445

SNVS570L – JANUARY 2009 – REVISED MAY 2013

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(26)

This is, of course, if the capacitors chosen have identical capacitance values and split the line voltage equally.

Often a 20% difference in capacitance could be observed between like capacitors. Therefore a voltage rating

margin of 25% to 50% should be considered.

Determining the capacitance value of the valley-fill capacitors:

The valley fill capacitors should be sized to supply energy to the buck converter (VBUCK) when the input line is

less than its peak divided by the number of stages used in the valley fill (tX). The capacitance value should be

calculated when the triac is not firing, i.e. when full LED current is being drawn by the LED string. The maximum

power is delivered to the LED string at this time, and therefore the most capacitance will be needed.

Figure 29. Two Stage Valley-Ffill VBUCK Voltage with no TRIAC Dimming

From the above illustration and the equation for current in a capacitor, i = C x dV/dt, the amount of capacitance

needed at VBUCK will be calculated as follows:

At 60Hz, and a valley-fill circuit of two stages, the hold up time (tX) required at VBUCK is calculated as follows. The

total angle of an AC half cycle is 180° and the total time of a half AC line cycle is 8.33 ms. When the angle of the

AC waveform is at 30° and 150°, the voltage of the AC line is exactly ½ of its peak. With a two stage valley-fill

circuit, this is the point where the LED string switches from power being derived from AC line to power being

derived from the hold up capacitors (C7 and C9). 60° out of 180° of the cycle or 1/3 of the cycle the power is

derived from the hold up capacitors (1/3 x 8.33 ms = 2.78 ms). This is equal to the hold up time (dt) from the

above equation, and dv is the amount of voltage the circuit is allowed to droop. From the next section

(“Determining Maximum Number of Series Connected LEDs Allowed”) we know the minimum VBUCK voltage will

be about 45V for a 90VAC to 135VAC line. At 90VAC low line operating condition input, ½ of the peak voltage is

64V. Therefore with some margin the voltage at VBUCK can not droop more than about 15V (dv). (i) is equal to

(POUT/VBUCK), where POUT is equal to (VLED x ILED). Total capacitance (C7 in parallel with C9) can now be

calculated. See DESIGN EXAMPLE for further calculations of the valley-fill capacitors.

Determining Maximum Number of Series Connected LEDs Allowed:

The LM3445 is an off-line buck topology LED driver. A buck converter topology requires that the input voltage

(VBUCK) of the output circuit must be greater than the voltage of the LED stack (VLED) for proper regulation. One

must determine what the minimum voltage observed by the buck converter will be before the maximum number

of LEDs allowed can be determined. Two variables will have to be determined in order to accomplish this.

1. AC line operating voltage. This is usually 90VAC to 135VAC for North America. Although the LM3445 can

operate at much lower and higher input voltages a range is needed to illustrate the design process.

2. How many stages are implemented in the valley-fill circuit (1, 2 or 3).

In this example the most common valley-fill circuit will be used (two stages).

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