MCP6S92 datasheet(27/40 Pages) MICROCHIP

27 / 40 page

 2004 Microchip Technology Inc.

DS21908A-page 27

MCP6S91/2/3

6.0

APPLICATIONS INFORMATION

6.1

Changing External Reference

Voltage

Figure 6-1 shows a MCP6S91 with the VREF pin at

2.5V and VDD = 5.0V. This allows the PGA to amplify

signals centered on 2.5V, instead of ground-referenced

signals. The voltage reference MCP1525 is buffered by

a MCP6021, which gives a low output impedance

reference voltage from DC to high frequencies. The

source driving the VREF pin should have an output

impedance less than 0.1

Ω to maintain reasonable gain

accuracy.

FIGURE 6-1:

PGA with Different External

Reference Voltage.

6.2

Capacitive Load and Stability

Large capacitive loads can cause stability problems

and reduced bandwidth for the MCP6S91/2/3 family of

PGAs (Figure 2-26 and Figure 2-28). As the load

capacitance increases, there is a corresponding

increase in frequency response peaking and step

response

overshoot

and

ringing.

This

happens

because a large load capacitance decreases the

internal amplifier’s phase margin and bandwidth.

When driving large capacitive loads with these PGAs

(i.e., > 60 pF), a small series resistor at the output

(RISO in Figure 6-2) improves the internal amplifier’s

stability by making the load resistive at higher

frequencies. The bandwidth will be generally lower

than the bandwidth with no capacitive load.

FIGURE 6-2:

PGA Circuit for Large

Capacitive Loads.

Figure 6-3 gives recommended RISO values for

different capacitive loads. After selecting RISO for your

circuit, double-check the resulting frequency response

peaking and step response overshoot on the bench.

Modify RISO’s value until the response is reasonable at

all gains.

FIGURE 6-3:

Recommended RISO.

6.3

Layout Considerations

Good PC board layout techniques will help achieve the

performance shown in the Electrical Characteristics

and Typical Performance Curves. It will also help

minimize Electromagnetic Compatibility (EMC) issues.

6.3.1

COMPONENT PLACEMENT

Separate different circuit functions: digital from analog,

low-speed from high-speed, and low-power from high-

power. This will reduce crosstalk.

Keep sensitive traces short and straight. Separate

them from interfering components and traces. This is

especially important for high-frequency (low rise time)

signals.

VDD

VREF

VIN

VOUT

MCP1525

MCP6021

1µF

MCP6S91

2.5V

REF

VIN

VOUT

MCP6S9X

RISO

100

1,000

100

1,000

10,000

oad Capacitance (F)

100

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