| Electronic Components Datasheet Search |
|
AD7739 Datasheet(PDF) 16 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD7739 Datasheet(HTML) 16 Page - Analog Devices |
|
16 / 32 page ![]() AD7739 Data Sheet Rev. A | Page 16 of 32 CHECKSUM REGISTER 16 Bits, Read/Write Register, Address 0x05 This register is described in the AN-626 Application Note, Using the AD7732/AD7734/ AD7738/AD7739 Checksum Register. ADC ZERO-SCALE CALIBRATION REGISTER 24 Bits, Read/Write Register, Address 0x06, Default Value 0x80 0000 This register holds the ADC zero-scale calibration coefficient. The value in this register is used in conjunction with the value in the ADC full-scale calibration register and the corresponding channel zero-scale and channel full-scale calibration registers to scale digitally the conversion results of all channels. The value in this register is updated automatically following the execution of an ADC zero-scale self-calibration. Writing this register is possible in the idle mode only (see the Calibration section for details). ADC FULL-SCALE CALIBRATION REGISTER 24 Bits, Read/Write Register, Address 0x07, Default Value 0x80 0000 This register holds the ADC full-scale calibration coefficient. The value in this register is used in conjunction with the value in the ADC zero-scale and the corresponding channel zero-scale and channel full-scale calibration registers to scale digitally the conversion results of all channels. The value in this register is updated automatically following the execution of an ADC full- scale self-calibration. Writing this register is possible in the idle mode only. Use the ADC full-scale self-calibration only on +2.5 V and ±2.5 V input voltage ranges (see the Calibration section for details). CHANNEL DATA REGISTERS 16-Bit/24-Bit, Read-Only Registers, Address 0x08 to Address 0x0F, Default Width 16 Bits, Default Value 0x8000 These registers contain the most up-to-date conversion results corresponding to each analog input channel. The 16-bit or 24-bit data width can be configured by setting the 24/16 bit in the mode register. The relevant RDY bit in the channel status register goes high when the result is updated. The RDY bit returns low once the data register reading begins. The RDY pin can be configured to indicate when any channel has unread data or to wait until all enabled channels have unread data. If any channel data register read operation is in progress when a new result is updated, no update of the data register occurs. This avoids having corrupted data. Reading the status registers can be associated with reading the data registers in the dump mode. Reading the status registers is always associated with reading the data registers in the continuous read mode (see the Digital Interface Description section for details). CHANNEL ZERO-SCALE CALIBRATION REGISTERS 24 Bits, Read/Write Registers, Address 0x10 to Address 0x17, Default Value 0x80 0000 These registers hold the particular channel zero-scale calibration coefficients. The value in these registers is used in conjunction with the value in the corresponding channel full- scale calibration register, the ADC zero-scale calibration register, and the ADC full-scale calibration register to digitally scale the particular channel conversion results. The value in this register is updated automatically following the execution of a channel zero-scale system calibration. The format of the channel zero-scale calibration register is a sign bit and a 22-bit unsigned value. Writing this register is possible in the idle mode only (see the Calibration section for details). CHANNEL FULL-SCALE CALIBRATION REGISTERS 24 Bits, Read/Write Registers, Address 0x18 to Address 0x1F, Default Value 0x20 0000 These registers hold the particular channel full-scale calibration coefficients. The value in these registers is used in conjunction with the value in the corresponding channel zero-scale calibration register, the ADC zero-scale calibration register, and the ADC full-scale calibration register to digitally scale the particular channel conversion results. The value in this register is updated automatically following the execution of a channel full-scale system calibration. Writing this register is possible in the idle mode only (see the Calibration section for details). |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |