MP38870 – 3A, 14V, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER

MP38870 Rev. 1.1

www.MonolithicPower.com

3

10/22/2009

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Parameters

Symbol Condition

Min

Typ

Max

Units

Power Good Threshold

0.69

0.74

0.79

V

Power Good Threshold Hysteresis

40

mV

PG Pin Level

PG Sink 4mA

0.4

V

Note:

4) Guaranteed by design.

PIN FUNCTIONS

Pin #

Name

Description

1

FB

Feedback. An external resistor divider from the output to GND, tapped to the FB pin sets

the output voltage. To prevent current limit run away during a short circuit fault condition

the frequency foldback comparator lowers the oscillator frequency when the FB voltage is

below 250mV.

2

PG

Power Good Indicator. The output of this pin is low if the output voltage is 10% less than

the nominal voltage, otherwise it is an open drain.

3

EN/SYNC On/Off Control and External Frequency Synchronization Input.

4, 5, 6

IN

Supply Voltage. The MP38870 operates from a +4.5V to +14V unregulated input. C1 is

needed to prevent large voltage spikes from appearing at the input.

7

N/C

No Connect.

8, 9, 10

SW

Switch Output.

11

BST

Bootstrap. This capacitor is needed to drive the power switch’s gate above the supply

voltage. It is connected between SW and BST pins to form a floating supply across the

power switch driver.

12

VCC

BG Driver Bias Supply. Decouple with a 1µF ceramic capacitor.

13

BG

Gate Driver Output. Connect this pin to the synchronous MOSFET Gate.

14

GND

Ground. This pin is the voltage reference for the regulated output voltage. For this reason

care must be taken in its layout. This node should be placed outside of the M2 to C1

ground path to prevent switching current spikes from inducing voltage noise into the part.