AD9203ARURL7 datasheet(14/28 Pages) AD

14 / 28 page

AD9203

Rev. B | Page 14 of 28

AD9203

Figure 25. Input Architecture

The structure of the input SHA places certain requirements on

the input drive source. The combination of the pin capacitance,

CP, and the hold capacitance, CH, is typically less than 5 pF. The

input source must be able to charge or discharge this

capacitance to 10-bit accuracy in one half of a clock cycle.

When the SHA goes into track mode, the input source must

charge or discharge capacitor CH from the voltage already stored

on CH to the new voltage. In the worst case, a full-scale voltage

step on the input source must provide the charging current

through the RON (100 Ω) of Switch 1 and quickly (within 1/2

CLK period) settle. This situation corresponds to driving a low

input impedance. Adding series resistance between the output

of the signal source and the AIN pin reduces the drive

requirements placed on the signal source. Figure 26 shows this

configuration. The bandwidth of the particular application

limits the size of this resistor. To maintain the performance

outlined in the data sheet specifications, the resistor should be

limited to 50 Ω or less. The series input resistor can be used to

isolate the driver from the AD9203’s switched capacitor input.

The external capacitor may be selected to limit the bandwidth

into the AD9203. Two input RC networks should be used to

balance differential input drive schemes (Figure 26).

The input span of the AD9203 is a function of the reference

voltage. For more information regarding the input range, see

the Internal Reference Connection and External Reference

Operation sections of the data sheet.

AIN

<50

Ω

AD9203

Figure 26. Simple AD9203 Drive Configuration

In many cases, particularly in single-supply operation, ac

coupling offers a convenient way of biasing the analog input

signal to the proper signal range. Figure 27 shows a typical

configuration for ac-coupling the analog input signal to the

AD9203. Maintaining the specifications outlined in the data

sheet requires careful selection of the component values. The

most important is the f–3 dB high-pass corner frequency. It is a

function of R2 and the parallel combination of C1 and C2.

AIN

VBIAS

VIN

AVDD/2

–

AD9203

Figure 27. AC-Coupled Input

The f–3 dB point can be approximated by the equation:

f−3dB = 1/(2π × [R2] CEQ)

where CEQ is the parallel combination of C1 and C2. Note that

C1 is typically a large electrolytic or tantalum capacitor that

becomes inductive at high frequencies. Add a small ceramic or

polystyrene capacitor (on the order of 0.01 µF) that is negligibly

inductive at higher frequencies while maintaining a low

impedance over a wide frequency range.

There are additional considerations when choosing the resistor

values for an ac-coupled input. The ac-coupling capacitors

integrate the switching transients present at the input of the

AD9203 and cause a net dc bias current, IB, to flow into the

input. The magnitude of the bias current increases as the signal

changes and as the clock frequency increases. This bias current

will result in an offset error of (R1 + R2) IB. If it is necessary to

compensate for this error, consider modifying VBIAS to

account for the resultant offset. In systems that must use dc

coupling, use an op amp to level shift ground-referenced signals

to comply with the input requirements of the AD9203.

OP AMP SELECTION GUIDE

Op amp selection for the AD9203 is highly application

dependent. In general, the performance requirements of any

given application can be characterized by either time domain or

frequency domain constraints. In either case, one should

carefully select an op amp that preserves the performance of the

A/D. This task becomes challenging when one considers the

AD9203’s high performance capabilities coupled with other

system level requirements such as power consumption and cost.

The ability to select the optimal op amp may be further

complicated by either limited power supply availability and/or

limited acceptable supplies for a desired op amp. Newer, high

performance op amps typically have input and output range

limitations in accordance with their lower supply voltages. As a

result, some op amps will be more appropriate in systems where

ac coupling is allowed. When dc coupling is required, the

headroom constraints of op amps (such as rail-to-rail op amps)

or ones where larger supplies can be used, should be

considered.

The following section describes some op amps currently

available from Analog Devices. Please contact the factory or

local sales office for updates on Analog Devices latest amplifier

product offerings.

AD9203ARURL7 Datasheet(PDF) 14 Page - Analog Devices

AD9203ARURL7 Datasheet(HTML) 14 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Datasheet Download

Link URL