AD9662

Rev. C | Page 12 of 16

EVALUATION BOARD

5V

ENR

V_OUT

CHIP_EN

EN2

OSCEN

EN3

AD9662

INR

1

IN2

2

GND

3

4

GND

16

15

14

13

IN3

5

OUTENR

6

OUTEN2

7

OUTEN3

8

ENABLE

OSCEN

12

11

10

9

DUT1

R4

9.53k

Ω

R9

23.7k

Ω

C5

0.1

μF

R6

50

Ω

W3

DNI

R7

50

Ω

W2

DNI

R8

50

Ω

W1

DNI

R11

50

Ω

W4

DNI

R10

DNI

W5

R1

3.1

Ω

R12

46.4

Ω

VIN2

VINW2

C2

0.1

μF

R3

4.32k

Ω

VINR

VINR

C3

0.1

μF

R2

4.32k

Ω

VIN3

VINW3

C4

0.1

μF

R5

4.32k

Ω

C1

0.1

μF

C8

DNI

R17

DNI

C9

0.1

μF

R13

5k

Ω

C7

10

μF

GND

DNI

D1

5V

5V

5V

5V

5V

Figure 17. AD9662 QSOP-16 Evaluation Board Schematic

Note: If dc logic levels are desired on the enable pins, then Jumper W1 through Jumper W5 should be used, and Resistor R6 through

Resistor R11 should not be installed. If the enable pins are driven from external signal sources, then these resistors should be

installed, and the jumpers are not necessary.