REV. 0

–6–

AD74111

PIN CONFIGURATION

VIN

CAPP

REFCAP

AGND

DGND

DVDD2

DVDD1

MCLK

VOUT

CAPN

AVDD

RESET

DOUT

DFS

DIN

DCLK

1

2

3

16

4

15

5

14

6

13

7

12

8

11

10

9

AD74111

TOP VIEW

(NOT TO SCALE)

PIN FUNCTION DESCRIPTIONS

Pin No.

Mnemonic

I/O

Description

1

DCLK

I/O

Serial Clock

2DIN

I

Serial Data Input. The state of DIN on the rising edge of RESET determines the operating mode

of the interface. See the Selecting Master or Slave Mode section for more information.

3

DFS

I/O

Frame Synchronization Signal

4

DOUT

O

Serial Data Output

5

RESET

IPower-Down/Reset Input

6

AVDD

Analog 2.5 V Power Supply Connection

7

CAPN

ADC Filter Capacitor (Negative)

8

VOUT

O

DAC Analog Output

9VIN

I

ADC Analog Input

10

CAPP

ADC Filter Capacitor (Positive)

11

REFCAP

I/O

Internal Reference Decoupling Capacitor. Can also be used for connection of an external reference.

12

AGND

Analog Ground Connection

13

DGND

Digital Ground Connection

14

DVDD2

Digital 2.5 V Power Supply Connection (Core)

15

DVDD1

Digital Power Supply Connection (Interface)

16

MCLK

I

External Master Clock Input