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AM79C960 Datasheet(PDF) 116 Page - Advanced Micro Devices |
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AM79C960 Datasheet(HTML) 116 Page - Advanced Micro Devices |
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116 / 127 page  P R E L I M I N A R Y AMD 1-458 Am79C960 SWITCHING WAVEFORMS: GPSI Transmit Clock (STDCLK) Transmit Data (TXDAT) Transmit Enable (TXEN) Carrier Present (RXCRS) (Note 1) Collision (CLSN) (Note 2) (First Bit Preamble) tGPT1 tGPT2 tGPT3 tGPT3 tGPT3 tGPT7 tGPT8 tGPT9 tGPT6 tGPT5 (Last Bit ) Notes: 1. If RXCRS is not present during transmission, LCAR bit in TMD3 will be set. 2. If CLSN is not present during or shortly after transmission, CERR in CSR0 will be set. 16907B-63 tGPT4 Transmit Timing Receive Clock (SRDCLK) (First Bit Preamble) (Address Type Designation Bit) (Last Bit) tGPR1 tGPR2 tGPR3 tGPR4 tGPR5 tGPR5 tGPR6 tGPR7 tGPR8 tGPR9 tGPR10 tGPR11 tGPR12 (No Collision) Receive Data (RXDAT) Carrier Present (RXCRS) Collision (CLSN), Active Collision (CLSN), Inactive tGPR4 16907B-64 Receive Timing |
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