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AM79C971VCW Datasheet(PDF) 204 Page - Advanced Micro Devices

Part # AM79C971VCW
Description  PCnet??FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
PDF  265 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C971VCW Datasheet(HTML) 204 Page - Advanced Micro Devices

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204
Am79C971
SWITCHING CHARACTERISTICS: BUS INTERFACE (CONTINUED)
Notes:
1. Not tested; parameter guaranteed by design characterization.
2. Parameter value is given for automatic EEPROM read operation. When EEPROM port (BCR19) is used to access the
EEPROM, software is responsible for meeting EEPROM timing requirements.
Parameter
Symbol
Parameter Name
Test Condition
Min
Max
Unit
Setup and Hold Timing
tSU
AD[31:00], C/BE[3:0], PAR, FRAME,
IRDY, TRDY, STOP, DEVSEL,
IDSEL Setup Time
7
ns
tH
AD[31:00], C/BE[3:0], PAR, FRAME,
IRDY, TRDY, STOP, DEVSEL,
IDSEL
Hold Time
0
ns
tSU (GNT)
GNT Setup Time
10
ns
tH (GNT)
GNT Hold Time
0
ns
EEPROM Timing
fEESK
EESK Frequency
(Note 2)
650
kHz
tHIGH (EESK)
EESK High Time
780
ns
tLOW (EESK)
EESK Low Time
780
ns
tVAL (EEDI)
EEDI Valid Output Delay from EESK (Note 2)
-15
15
ns
tVAL (EECS)
EECS Valid Output Delay from
EESK
(Note 2)
-15
15
ns
tLOW (EECS)
EECS Low Time
1550
ns
tSU (EEDO)
EEDO Setup Time to EESK
(Note 2)
50
ns
tH (EEDO)
EEDO Hold Time from EESK
(Note 2)
0
ns
JTAG (IEEE 1149.1) Test Signal Timing
tJ1
TCK Frequency
10
MHz
tJ2
TCK Period
100
ns
tJ3
TCK High Time
@ 2.0 V
45
ns
tJ4
TCK Low Time
@ 0.8 V
45
ns
tJ5
TCK Rise Time
4
ns
tJ6
TCK Fall Time
4
ns
tJ7
TDI, TMS Setup Time
8
ns
tJ8
TDI, TMS Hold Time
10
ns
tJ9
TDO Valid Delay
3
30
ns
tJ10
TDO Float Delay
50
ns
tJ11
All Outputs (Non-Test) Valid Delay
3
25
ns
tJ12
All Outputs (Non-Test) Float Delay
36
ns
tJ13
All Inputs (Non-Test)) Setup Time
8
ns
tJ14
All Inputs (Non-Test) Hold Time
7
ns



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